Zhang Jinyi, Wang Jia, Lin Feng, Jia Yanhui, Zhou Kai
{"title":"基于双平衡策略的反向SoC TAM设计特性理论研究","authors":"Zhang Jinyi, Wang Jia, Lin Feng, Jia Yanhui, Zhou Kai","doi":"10.1109/ICEPT.2008.4607020","DOIUrl":null,"url":null,"abstract":"The paper presents a reverse SoC TAM design based dual-balanced strategy, which is on the basis of IEEE1500. Firstly test scheduling is executed according to the conceptual TAM architecture that is physically realizable, and then the real TAM architecture can be reversely established according to the test scheduling result. Since the test scheduling is not limited by TAM architecture, the test scheduling optimization can involve both top level and IP level and obtain the cross-level combined optimization between these two levels. The experimental results on the ITCpsila02 show the better availability and reliability and the performance improvement on test time of the proposed method, compared with several other representative approaches. Particularly, the method of this paper is based on the practical test cost, thus is of greatly practical value.","PeriodicalId":6324,"journal":{"name":"2008 International Conference on Electronic Packaging Technology & High Density Packaging","volume":"43 1","pages":"1-5"},"PeriodicalIF":0.0000,"publicationDate":"2008-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Research on the characteristics theory of reverse SoC TAM design based on dual-balanced strategy\",\"authors\":\"Zhang Jinyi, Wang Jia, Lin Feng, Jia Yanhui, Zhou Kai\",\"doi\":\"10.1109/ICEPT.2008.4607020\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The paper presents a reverse SoC TAM design based dual-balanced strategy, which is on the basis of IEEE1500. Firstly test scheduling is executed according to the conceptual TAM architecture that is physically realizable, and then the real TAM architecture can be reversely established according to the test scheduling result. Since the test scheduling is not limited by TAM architecture, the test scheduling optimization can involve both top level and IP level and obtain the cross-level combined optimization between these two levels. The experimental results on the ITCpsila02 show the better availability and reliability and the performance improvement on test time of the proposed method, compared with several other representative approaches. Particularly, the method of this paper is based on the practical test cost, thus is of greatly practical value.\",\"PeriodicalId\":6324,\"journal\":{\"name\":\"2008 International Conference on Electronic Packaging Technology & High Density Packaging\",\"volume\":\"43 1\",\"pages\":\"1-5\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-07-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 International Conference on Electronic Packaging Technology & High Density Packaging\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICEPT.2008.4607020\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 International Conference on Electronic Packaging Technology & High Density Packaging","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEPT.2008.4607020","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Research on the characteristics theory of reverse SoC TAM design based on dual-balanced strategy
The paper presents a reverse SoC TAM design based dual-balanced strategy, which is on the basis of IEEE1500. Firstly test scheduling is executed according to the conceptual TAM architecture that is physically realizable, and then the real TAM architecture can be reversely established according to the test scheduling result. Since the test scheduling is not limited by TAM architecture, the test scheduling optimization can involve both top level and IP level and obtain the cross-level combined optimization between these two levels. The experimental results on the ITCpsila02 show the better availability and reliability and the performance improvement on test time of the proposed method, compared with several other representative approaches. Particularly, the method of this paper is based on the practical test cost, thus is of greatly practical value.