Shu‐Han Hsu, Hung-Chih Chang, C. Chu, Yen‐Ting Chen, W. Tu, F. Hou, Chih-hung Lo, P. Sung, Bo-Yuan Chen, G. Huang, G. Luo, Cheewee Liu, C. Hu, Fu-Liang Yang
{"title":"具有(111)侧壁增强离子和几乎无缺陷通道的硅基三角形沟道Ge非场效应管","authors":"Shu‐Han Hsu, Hung-Chih Chang, C. Chu, Yen‐Ting Chen, W. Tu, F. Hou, Chih-hung Lo, P. Sung, Bo-Yuan Chen, G. Huang, G. Luo, Cheewee Liu, C. Hu, Fu-Liang Yang","doi":"10.1109/IEDM.2012.6479090","DOIUrl":null,"url":null,"abstract":"Due to the highest electron mobility (2200 cm<sup>2</sup>/Vs) on (111) Ge surface, the n-channel triangular Ge gate-all-around (GAA) FET with (111) sidewalls on Si and L<sub>g</sub>=350 nm shows 2x enhanced I<sub>on</sub> of 110 μA/μm at 1V with respect to the devices with near (110) sidewalls. A novel process to etch away the defective Ge near Ge/Si interface from epitaxial Ge grown on SOI achieves a nearly defect-free channel, good gate control triangular gate, and larger effective width. Electrostatic control of SS= 94 mV/dec (at 1V) can be further improved if superior gate stack than EOT= 5.5 nm and D<sub>it</sub>= 1×10<sup>12</sup> cm<sup>-2</sup>eV<sup>-1</sup> is used. The I<sub>on</sub> can be further enhanced if the line edge roughness (LER) can be reduced. The Ge GAA n-FET is reported for the first time with CMOS compatible process, which makes the circuits integration much easier.","PeriodicalId":6376,"journal":{"name":"2012 International Electron Devices Meeting","volume":"21 1","pages":"23.6.1-23.6.4"},"PeriodicalIF":0.0000,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":"{\"title\":\"Triangular-channel Ge NFETs on Si with (111) sidewall-enhanced Ion and nearly defect-free channels\",\"authors\":\"Shu‐Han Hsu, Hung-Chih Chang, C. Chu, Yen‐Ting Chen, W. Tu, F. Hou, Chih-hung Lo, P. Sung, Bo-Yuan Chen, G. Huang, G. Luo, Cheewee Liu, C. Hu, Fu-Liang Yang\",\"doi\":\"10.1109/IEDM.2012.6479090\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Due to the highest electron mobility (2200 cm<sup>2</sup>/Vs) on (111) Ge surface, the n-channel triangular Ge gate-all-around (GAA) FET with (111) sidewalls on Si and L<sub>g</sub>=350 nm shows 2x enhanced I<sub>on</sub> of 110 μA/μm at 1V with respect to the devices with near (110) sidewalls. A novel process to etch away the defective Ge near Ge/Si interface from epitaxial Ge grown on SOI achieves a nearly defect-free channel, good gate control triangular gate, and larger effective width. Electrostatic control of SS= 94 mV/dec (at 1V) can be further improved if superior gate stack than EOT= 5.5 nm and D<sub>it</sub>= 1×10<sup>12</sup> cm<sup>-2</sup>eV<sup>-1</sup> is used. The I<sub>on</sub> can be further enhanced if the line edge roughness (LER) can be reduced. The Ge GAA n-FET is reported for the first time with CMOS compatible process, which makes the circuits integration much easier.\",\"PeriodicalId\":6376,\"journal\":{\"name\":\"2012 International Electron Devices Meeting\",\"volume\":\"21 1\",\"pages\":\"23.6.1-23.6.4\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"17\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 International Electron Devices Meeting\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.2012.6479090\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 International Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2012.6479090","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Triangular-channel Ge NFETs on Si with (111) sidewall-enhanced Ion and nearly defect-free channels
Due to the highest electron mobility (2200 cm2/Vs) on (111) Ge surface, the n-channel triangular Ge gate-all-around (GAA) FET with (111) sidewalls on Si and Lg=350 nm shows 2x enhanced Ion of 110 μA/μm at 1V with respect to the devices with near (110) sidewalls. A novel process to etch away the defective Ge near Ge/Si interface from epitaxial Ge grown on SOI achieves a nearly defect-free channel, good gate control triangular gate, and larger effective width. Electrostatic control of SS= 94 mV/dec (at 1V) can be further improved if superior gate stack than EOT= 5.5 nm and Dit= 1×1012 cm-2eV-1 is used. The Ion can be further enhanced if the line edge roughness (LER) can be reduced. The Ge GAA n-FET is reported for the first time with CMOS compatible process, which makes the circuits integration much easier.