基于三维元件库的传统FCBGA衬底高效快速112Gbps/PAM4信号线设计

2020 IEEE 70th Electronic Components and Technology Conference (ECTC) Pub Date : 2020-06-01 DOI:10.1109/ectc32862.2020.00156

R. Oikawa

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引用次数: 0

摘要

本文提出并演示了一种基于元件库的设计，该设计将LSI产品封装的112Gbps信号设计前置时间从几个月减少到几天，同时保持设计对制造工艺偏差的稳健性，并提供三维(3-D)电磁(EM)仿真精度。

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An Efficient and Fast 112Gbps/PAM4 Signal Line Design with Conventional FCBGA Substrate Based on a 3-D Component Library

This paper proposes and demonstrates a component library-based design that reduces 112Gbps signal design lead-time of LSI product package from months to several days with keeping design robustness against fabrication process deviation, as well as offering three-dimensional (3-D) electromagnetic (EM) simulation accuracy.

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2020 IEEE 70th Electronic Components and Technology Conference (ECTC)

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