衬底填充方式对晶圆级封装焊点疲劳的影响

2008 International Conference on Electronic Packaging Technology & High Density Packaging Pub Date : 2008-07-28 DOI:10.1109/ICEPT.2008.4607137

C. Regard, C. Gautier, H. Frémont, P. Poirier

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引用次数: 4

摘要

为了提高微型化，CSWLP(芯片尺寸晶圆级封装)得到了发展。然而，由于难以获得良好的焊点可靠性，导致只能制造小型CSWLP模块。通过实测和仿真，对不同的下填方法进行了评价，结果表明下填是必要的，但选择不当也会降低可靠性。最初的一种方法被称为ldquore-enforcementrdquo，它提高了生命周期。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Influence of underfill methods on the solder joint fatigue of wafer level packaging

To increase miniaturization, CSWLP (chip size wafer level packaging) has been developed. However, the difficulty to get good solder joint reliability leads to manufacture only small CSWLP modules. Different underfill methods are evaluated here, by measurements and simulations: results prove that underfill is necessary, but a bad choice can also decrease the reliability. An original method called ldquore-enforcementrdquo improves the life time.

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来源期刊

2008 International Conference on Electronic Packaging Technology & High Density Packaging

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