使用整数规划的快速PCB堆叠优化

Jiayi He;Ling Zhang;Zurab Kiguradze;Arun Chada;Adam Klivans;Bhyrav Mutnury;Er-Ping Li;Jun Fan
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引用次数: 0

摘要

本文提出了一种灵活高效的方法来优化具有巨大搜索空间和各种设计约束的多层印刷电路板(PCB)的堆叠。PCB堆叠优化在高速系统设计中至关重要,以实现所需的电气性能,同时降低系统成本。对于大量的层来说,堆叠优化过程是劳动密集型的并且耗时。此外,在优化过程之后,实际设计的电气性能,例如阻抗和损耗,可能由于制造变化而偏离目标设计。估计制造变化引起的最坏情况,在本文中被称为“拐角情况”,对于自信的PCB设计至关重要,但由于相关参数的数量很大,因此具有挑战性。在本文中,使用整数编程技术,解决了PCB堆叠优化和拐角案例搜索问题,并大大加快了速度。所有约束都转换为数学等式和不等式,这些等式和不等式可以通过整数规划求解器快速求解,以获得可行的叠加解。在基于堆叠设计优化传输线的横截面以实现目标电性能之后,当设计参数在特定范围内变化时,使用整数编程来获取阻抗和损耗的上限和下限。使用具有实际约束的多层PCB设计验证了所提出的方法,并证明了其有效性和高效性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Fast PCB Stack-Up Optimization Using Integer Programming
This article presents a flexible and efficient methodology to optimize stack-up for multilayer printed circuit boards (PCBs) with enormous search space and various design constraints. PCB stack-up optimization is crucial in high-speed system design to achieve the desired electrical performance while reducing system costs. The stack-up optimization process is labor-intensive and time-consuming for a large number of layers. Moreover, after the optimization process, the electrical performance of a real design, such as the impedance and loss, may deviate from the target design due to manufacturing variations. Estimating the worst cases due to the manufacturing variations, referred to as “corner cases” in this article, is essential for a confident PCB design but challenging since the number of related parameters is large. In this article, PCB stack-up optimization and corner-case searching are addressed and greatly accelerated using the integer programming technique. All constraints are converted to mathematical equalities and inequalities that can be solved rapidly by an integer programming solver to obtain feasible stack-up solutions. After the cross sections of the transmission lines are optimized based on the stack-up design to achieve a target electrical performance, the upper and lower bound of impedance and loss are acquired using integer programming when the design parameters vary in a particular range. The proposed method is verified using multilayer PCB designs with practical constraints and demonstrates its effectiveness and high efficiency.
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