可控延迟线的设计

A. Kabiri, Qing He, Mohammed H. Kermani, Omar M. Ramahi
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引用次数: 15

摘要

延迟线用于印刷电路板(pcb),以产生两点(或设备)之间的延迟,同时占用尽可能少的电路板空间。当电路中使用较高的时钟频率时,延迟线相邻走线之间的电磁耦合会增加。发生在所有并行相邻线路之间的耦合以同步或异步方式组合在一起,从而导致分散。因此,预测延迟线行为的简单分析技术对于预测精确的延迟是无效的,昂贵的全波建模或测量变得必不可少。本文以微带弯曲延迟线为研究对象,采用全波建模和测量方法,研究了微带弯曲延迟线段数对延时的影响。我们表明,对于较短的段,当段数足够大时,每个段的延迟几乎是均匀的,并且不随段数的增加而变化。我们展示了段数与总延迟之间的线性关系,从而允许简单的延迟线设计,而无需整个延迟线结构的全波三维建模的高昂成本。数值模拟和实验测量支持了这些发现的论证。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design of a Controllable Delay Line
Delay lines are used in printed circuit boards (PCBs) to produce delay between two points (or devices) while occupying as little board space as possible. As higher clock frequency is used in circuits, electromagnetic coupling between adjacent traces of delay line increases. The coupling that takes place between all the parallel adjoining traces combines synchronously or asynchronously to cause dispersion. Consequently, simple analytic techniques that predict delay line behavior are ineffective to predict precise delay and costly full-wave modeling or measurement becomes essential. In this paper, we consider microstrip meander delay lines and study the effect of the number of segments on resulting delay using full-wave modeling and measurement. We show that for short segments and when the number of segments is large enough, the resulting delay per segment is almost uniform and does not change as the number of segments increases. We show a linear relationship between the number of segments and the total delay, thus allowing for simple delay line design without the prohibitive cost of full-wave three-dimensional modeling of the entire delay line structure. Demonstration of these findings is supported by numerical simulations and experimental measurement.
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来源期刊
IEEE Transactions on Advanced Packaging
IEEE Transactions on Advanced Packaging 工程技术-材料科学:综合
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