现代区域阵列封装中的逃逸路径:需求、趋势与能力分析

B. Jaiswal, M. Roy, A. Titus
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引用次数: 0

摘要

随着微电子工业中芯片和封装设计的日益复杂以及成本压力的不断增大,输入/输出(I/O)路由设计在整个产品设计中起着至关重要的作用。这种情况主要是由芯片和封装中I/O终端数量的增加所驱动的。一些作者已经描述了使用各种逃逸路由模型以最大化给定区域内I/ o数量的可能性。然而,这些模型存在许多缺陷,未能解决加工因素和实际制造条件的重要性。因此,为了在实际制造、加工和成本相关的约束下实现最大的I/O密度,开发了一种新的逃逸路由设计准则。本文探讨了现实世界的约束及其对I/O路由的影响之间的相关性,并将其用作开发设计指南的基础。这种方法是通过一个全面的案例研究来呈现的,该案例研究涵盖了各种设计场景,提供了需要考虑的正确的现实世界权衡集,同时突出了现有模型中的缺点。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Escape Routing in Modern Area Array Packaging: An Analysis of Need, Trend, and Capability
With the increasing complexity in the die and package designs and ever increasing cost pressure in today's microelectronic industry, the design for input/output (I/O) routing has assumed a vital role in the overall product design. This scenario is primarily driven by the increase in the I/O terminal counts in both die and package. Several authors have already described the possibility of using various escape routing models in order to maximize the number of I/Os in a given area. However, these models suffer from many drawbacks and fail to address the importance of processing factors and the actual manufacturing conditions. Therefore, a new design guideline for escape routing has been developed to achieve the maximum I/O density under the actual manufacturing, processing and cost related constraints. The correlation between the real world constraints and their impact on I/O routing has been explored and used as a foundation for developing design guidelines. This approach has been presented through a comprehensive case study that covers various design scenarios, provides the right set of real world trade-offs that need to be considered and simultaneously highlights the drawbacks in existing models.
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来源期刊
IEEE Transactions on Advanced Packaging
IEEE Transactions on Advanced Packaging 工程技术-材料科学:综合
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