J. Govaerts, E. Bosman, W. Christiaens, J. Vanfleteren
{"title":"扁平超薄芯片封装(UTCP)技术的细间距性能","authors":"J. Govaerts, E. Bosman, W. Christiaens, J. Vanfleteren","doi":"10.1109/TADVP.2009.2018134","DOIUrl":null,"url":null,"abstract":"This paper describes the fine-pitch interconnection capabilities of the ultra-thin chip packaging (UTCP) technology, a technology under development for embedding thin chips in a flexible polyimide (PI) substrate. It allows for fully flexible electronics, as the rigid chips are thinned down to 20-30 ¿m, at which point they become truly flexible themselves. This way, instead of just a flexible substrate with rigid components assembled on top, the entire circuitry can be incorporated inside a 30-40 ¿m thin chip package. The paper briefly introduces the technology's background with a short description of the fabrication process. Building on the developments already achieved, some further optimizations are discussed, and the technology is tested for its fine-pitch interconnection capabilities using test chips with four-point probe and daisy chain patterns, with a pitch down to 40 ¿m. The possibility to package several chips in the same substrate is investigated, as well, and finally an outlook on future experiments is briefly discussed.","PeriodicalId":55015,"journal":{"name":"IEEE Transactions on Advanced Packaging","volume":"33 1","pages":"72-78"},"PeriodicalIF":0.0000,"publicationDate":"2010-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/TADVP.2009.2018134","citationCount":"16","resultStr":"{\"title\":\"Fine-Pitch Capabilities of the Flat Ultra-Thin Chip Packaging (UTCP) Technology\",\"authors\":\"J. Govaerts, E. Bosman, W. Christiaens, J. Vanfleteren\",\"doi\":\"10.1109/TADVP.2009.2018134\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes the fine-pitch interconnection capabilities of the ultra-thin chip packaging (UTCP) technology, a technology under development for embedding thin chips in a flexible polyimide (PI) substrate. It allows for fully flexible electronics, as the rigid chips are thinned down to 20-30 ¿m, at which point they become truly flexible themselves. This way, instead of just a flexible substrate with rigid components assembled on top, the entire circuitry can be incorporated inside a 30-40 ¿m thin chip package. The paper briefly introduces the technology's background with a short description of the fabrication process. Building on the developments already achieved, some further optimizations are discussed, and the technology is tested for its fine-pitch interconnection capabilities using test chips with four-point probe and daisy chain patterns, with a pitch down to 40 ¿m. The possibility to package several chips in the same substrate is investigated, as well, and finally an outlook on future experiments is briefly discussed.\",\"PeriodicalId\":55015,\"journal\":{\"name\":\"IEEE Transactions on Advanced Packaging\",\"volume\":\"33 1\",\"pages\":\"72-78\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-02-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://sci-hub-pdf.com/10.1109/TADVP.2009.2018134\",\"citationCount\":\"16\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Advanced Packaging\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TADVP.2009.2018134\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Advanced Packaging","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TADVP.2009.2018134","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Fine-Pitch Capabilities of the Flat Ultra-Thin Chip Packaging (UTCP) Technology
This paper describes the fine-pitch interconnection capabilities of the ultra-thin chip packaging (UTCP) technology, a technology under development for embedding thin chips in a flexible polyimide (PI) substrate. It allows for fully flexible electronics, as the rigid chips are thinned down to 20-30 ¿m, at which point they become truly flexible themselves. This way, instead of just a flexible substrate with rigid components assembled on top, the entire circuitry can be incorporated inside a 30-40 ¿m thin chip package. The paper briefly introduces the technology's background with a short description of the fabrication process. Building on the developments already achieved, some further optimizations are discussed, and the technology is tested for its fine-pitch interconnection capabilities using test chips with four-point probe and daisy chain patterns, with a pitch down to 40 ¿m. The possibility to package several chips in the same substrate is investigated, as well, and finally an outlook on future experiments is briefly discussed.