{"title":"细节距铜桩凸点WLP热-机械可靠性分析","authors":"Haiyan Sun, Gao Bo, Jicong Zhao","doi":"10.1108/ssmt-06-2020-0027","DOIUrl":null,"url":null,"abstract":"\nPurpose\nThis study aims to investigate the several parameters in wafer-level packaging (WLP) to find the most critical factor impacting the thermal fatigue life, such as the height of copper post, the height of solder bump, the thickness of chip. The FEA results indicate the height of solder bumps is the most important factor in the whole structure.\n\n\nDesign/methodology/approach\nThe copper post bumps with 65 µm pitch are proposed to investigate the thermal-mechanical performance of WLP. The thermal cycle simulation is used to evaluate the reliability of WLP by using finite element analysis (FEA). Taguchi method is adopted to obtain the sensitivity of parameters of three-dimension finite element model, for an optimized configuration.\n\n\nFindings\nIt can be found that the optimal design has increased thermal fatigue life by 147% compared with the original one.\n\n\nOriginality/value\nIt is concluded that the finite element simulation results show outstanding thermal-mechanical performances of the proposed 65 µm pitch copper post bumps of WLP, including low plastic strain, high thermal fatigue life, which are desired for mobile device.\n","PeriodicalId":49499,"journal":{"name":"Soldering & Surface Mount Technology","volume":" ","pages":""},"PeriodicalIF":1.7000,"publicationDate":"2020-11-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1108/ssmt-06-2020-0027","citationCount":"3","resultStr":"{\"title\":\"Thermal-mechanical reliability analysis of WLP with fine-pitch copper post bumps\",\"authors\":\"Haiyan Sun, Gao Bo, Jicong Zhao\",\"doi\":\"10.1108/ssmt-06-2020-0027\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"\\nPurpose\\nThis study aims to investigate the several parameters in wafer-level packaging (WLP) to find the most critical factor impacting the thermal fatigue life, such as the height of copper post, the height of solder bump, the thickness of chip. The FEA results indicate the height of solder bumps is the most important factor in the whole structure.\\n\\n\\nDesign/methodology/approach\\nThe copper post bumps with 65 µm pitch are proposed to investigate the thermal-mechanical performance of WLP. The thermal cycle simulation is used to evaluate the reliability of WLP by using finite element analysis (FEA). Taguchi method is adopted to obtain the sensitivity of parameters of three-dimension finite element model, for an optimized configuration.\\n\\n\\nFindings\\nIt can be found that the optimal design has increased thermal fatigue life by 147% compared with the original one.\\n\\n\\nOriginality/value\\nIt is concluded that the finite element simulation results show outstanding thermal-mechanical performances of the proposed 65 µm pitch copper post bumps of WLP, including low plastic strain, high thermal fatigue life, which are desired for mobile device.\\n\",\"PeriodicalId\":49499,\"journal\":{\"name\":\"Soldering & Surface Mount Technology\",\"volume\":\" \",\"pages\":\"\"},\"PeriodicalIF\":1.7000,\"publicationDate\":\"2020-11-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://sci-hub-pdf.com/10.1108/ssmt-06-2020-0027\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Soldering & Surface Mount Technology\",\"FirstCategoryId\":\"88\",\"ListUrlMain\":\"https://doi.org/10.1108/ssmt-06-2020-0027\",\"RegionNum\":4,\"RegionCategory\":\"材料科学\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Soldering & Surface Mount Technology","FirstCategoryId":"88","ListUrlMain":"https://doi.org/10.1108/ssmt-06-2020-0027","RegionNum":4,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Thermal-mechanical reliability analysis of WLP with fine-pitch copper post bumps
Purpose
This study aims to investigate the several parameters in wafer-level packaging (WLP) to find the most critical factor impacting the thermal fatigue life, such as the height of copper post, the height of solder bump, the thickness of chip. The FEA results indicate the height of solder bumps is the most important factor in the whole structure.
Design/methodology/approach
The copper post bumps with 65 µm pitch are proposed to investigate the thermal-mechanical performance of WLP. The thermal cycle simulation is used to evaluate the reliability of WLP by using finite element analysis (FEA). Taguchi method is adopted to obtain the sensitivity of parameters of three-dimension finite element model, for an optimized configuration.
Findings
It can be found that the optimal design has increased thermal fatigue life by 147% compared with the original one.
Originality/value
It is concluded that the finite element simulation results show outstanding thermal-mechanical performances of the proposed 65 µm pitch copper post bumps of WLP, including low plastic strain, high thermal fatigue life, which are desired for mobile device.
期刊介绍:
Soldering & Surface Mount Technology seeks to make an important contribution to the advancement of research and application within the technical body of knowledge and expertise in this vital area. Soldering & Surface Mount Technology compliments its sister publications; Circuit World and Microelectronics International.
The journal covers all aspects of SMT from alloys, pastes and fluxes, to reliability and environmental effects, and is currently providing an important dissemination route for new knowledge on lead-free solders and processes. The journal comprises a multidisciplinary study of the key materials and technologies used to assemble state of the art functional electronic devices. The key focus is on assembling devices and interconnecting components via soldering, whilst also embracing a broad range of related approaches.