成核层厚度对降低AlN层位错密度的影响

IF 0.7 4区 工程技术 Q4 ENGINEERING, ELECTRICAL & ELECTRONIC
M. Samsudin, Y. Yusuf, N. Zainal, A. Bakar, C. Zollner, M. Iza, S. Denbaars
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引用次数: 0

摘要

目的研究AlN成核厚度对降低蓝宝石衬底上生长的AlN层中穿线位错密度的影响。设计/方法/方法在这项工作中,5 nm,10 nm和20 nm对通过金属有机化学气相沉积降低过度生长的AlN层中的位错密度的影响进行了讨论。没有成核层的AlN层也包括在该研究中以进行比较。查找通过插入10 nm厚的成核层,AlN层中的位错密度可低至9.0×108 具有该成核层的AlN层的表面比其对应物更光滑。原创性/价值本文讨论了成核厚度的影响及其降低蓝宝石AlN层位错密度的可能机制。作者相信,这一发现将引起本杂志读者的兴趣,尤其是那些在AlN领域工作的读者。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Effect of nucleation layer thickness on reducing dislocation density in AlN layer for AlGaN-based UVC LED
Purpose The purpose of this study is to investigate the influence of AlN nucleation thickness in reducing the threading dislocations density in AlN layer grown on sapphire substrate. Design/methodology/approach In this work, the effect of the nucleation thickness at 5 nm, 10 nm and 20 nm on reducing the dislocation density in the overgrown AlN layer by metal organic chemical vapor deposition was discussed. The AlN layer without the nucleation layer was also included in this study for comparison. Findings By inserting the 10 nm thick nucleation layer, the density of the dislocation in the AlN layer can be as low as 9.0 × 108 cm−2. The surface of the AlN layer with that nucleation layer was smoother than its counterparts. Originality/value This manuscript discussed the influence of nucleation thickness and its possible mechanism in reducing dislocations density in the AlN layer on sapphire. The authors believe that the finding will be of interest to the readers of this journal, in particular those who are working on the area of AlN.
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来源期刊
Microelectronics International
Microelectronics International 工程技术-材料科学:综合
CiteScore
1.90
自引率
9.10%
发文量
28
审稿时长
>12 weeks
期刊介绍: Microelectronics International provides an authoritative, international and independent forum for the critical evaluation and dissemination of research and development, applications, processes and current practices relating to advanced packaging, micro-circuit engineering, interconnection, semiconductor technology and systems engineering. It represents a current, comprehensive and practical information tool. The Editor, Dr John Atkinson, welcomes contributions to the journal including technical papers, research papers, case studies and review papers for publication. Please view the Author Guidelines for further details. Microelectronics International comprises a multi-disciplinary study of the key technologies and related issues associated with the design, manufacture, assembly and various applications of miniaturized electronic devices and advanced packages. Among the broad range of topics covered are: • Advanced packaging • Ceramics • Chip attachment • Chip on board (COB) • Chip scale packaging • Flexible substrates • MEMS • Micro-circuit technology • Microelectronic materials • Multichip modules (MCMs) • Organic/polymer electronics • Printed electronics • Semiconductor technology • Solid state sensors • Thermal management • Thick/thin film technology • Wafer scale processing.
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