D. Sangani;J. Diaz-Fortuny;E. Bury;J. Franco;B. Kaczer;G. Gielen
{"title":"基于28纳米CMOS技术的环形振荡器bti驱动退化建模分析","authors":"D. Sangani;J. Diaz-Fortuny;E. Bury;J. Franco;B. Kaczer;G. Gielen","doi":"10.1109/TDMR.2023.3288380","DOIUrl":null,"url":null,"abstract":"With tightening reliability margins, product-level aging analysis is gradually gaining impetus and is set to become an integral part of the modern design flow. Increased emphasis is placed on the development of physics-based compact models for the phenomena responsible for transistor degradation and their integration into EDA environments. Commercial Process Design Kits (PDKs) of advanced technologies have also started to include compact models for transistor degradation along with a dedicated reliability simulation framework. In this work, we present a comprehensive study of the compact aging models in one such commercial PDK, with the help of extensive measurement data from individual devices as well as Ring Oscillators (RO). Then, we perform our own extraction of model parameter shifts from full \n<inline-formula> <tex-math>$I_{d}$ </tex-math></inline-formula>\n-\n<inline-formula> <tex-math>$V_{gs}$ </tex-math></inline-formula>\n fitting of the measured BTI-stressed devices to gain insight into the modeling procedure adopted by the foundry. We finally use the parameters extracted thusly to investigate the impact of the time-0 and the time-dependent device-to-device variability on RO degradation.","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"23 3","pages":"346-354"},"PeriodicalIF":2.5000,"publicationDate":"2023-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Modeling Analysis of BTI-Driven Degradation of a Ring Oscillator Designed in a 28-nm CMOS Technology\",\"authors\":\"D. Sangani;J. Diaz-Fortuny;E. Bury;J. Franco;B. Kaczer;G. Gielen\",\"doi\":\"10.1109/TDMR.2023.3288380\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"With tightening reliability margins, product-level aging analysis is gradually gaining impetus and is set to become an integral part of the modern design flow. Increased emphasis is placed on the development of physics-based compact models for the phenomena responsible for transistor degradation and their integration into EDA environments. Commercial Process Design Kits (PDKs) of advanced technologies have also started to include compact models for transistor degradation along with a dedicated reliability simulation framework. In this work, we present a comprehensive study of the compact aging models in one such commercial PDK, with the help of extensive measurement data from individual devices as well as Ring Oscillators (RO). Then, we perform our own extraction of model parameter shifts from full \\n<inline-formula> <tex-math>$I_{d}$ </tex-math></inline-formula>\\n-\\n<inline-formula> <tex-math>$V_{gs}$ </tex-math></inline-formula>\\n fitting of the measured BTI-stressed devices to gain insight into the modeling procedure adopted by the foundry. We finally use the parameters extracted thusly to investigate the impact of the time-0 and the time-dependent device-to-device variability on RO degradation.\",\"PeriodicalId\":448,\"journal\":{\"name\":\"IEEE Transactions on Device and Materials Reliability\",\"volume\":\"23 3\",\"pages\":\"346-354\"},\"PeriodicalIF\":2.5000,\"publicationDate\":\"2023-06-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Device and Materials Reliability\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10159151/\",\"RegionNum\":3,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Device and Materials Reliability","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10159151/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Modeling Analysis of BTI-Driven Degradation of a Ring Oscillator Designed in a 28-nm CMOS Technology
With tightening reliability margins, product-level aging analysis is gradually gaining impetus and is set to become an integral part of the modern design flow. Increased emphasis is placed on the development of physics-based compact models for the phenomena responsible for transistor degradation and their integration into EDA environments. Commercial Process Design Kits (PDKs) of advanced technologies have also started to include compact models for transistor degradation along with a dedicated reliability simulation framework. In this work, we present a comprehensive study of the compact aging models in one such commercial PDK, with the help of extensive measurement data from individual devices as well as Ring Oscillators (RO). Then, we perform our own extraction of model parameter shifts from full
$I_{d}$
-
$V_{gs}$
fitting of the measured BTI-stressed devices to gain insight into the modeling procedure adopted by the foundry. We finally use the parameters extracted thusly to investigate the impact of the time-0 and the time-dependent device-to-device variability on RO degradation.
期刊介绍:
The scope of the publication includes, but is not limited to Reliability of: Devices, Materials, Processes, Interfaces, Integrated Microsystems (including MEMS & Sensors), Transistors, Technology (CMOS, BiCMOS, etc.), Integrated Circuits (IC, SSI, MSI, LSI, ULSI, ELSI, etc.), Thin Film Transistor Applications. The measurement and understanding of the reliability of such entities at each phase, from the concept stage through research and development and into manufacturing scale-up, provides the overall database on the reliability of the devices, materials, processes, package and other necessities for the successful introduction of a product to market. This reliability database is the foundation for a quality product, which meets customer expectation. A product so developed has high reliability. High quality will be achieved because product weaknesses will have been found (root cause analysis) and designed out of the final product. This process of ever increasing reliability and quality will result in a superior product. In the end, reliability and quality are not one thing; but in a sense everything, which can be or has to be done to guarantee that the product successfully performs in the field under customer conditions. Our goal is to capture these advances. An additional objective is to focus cross fertilized communication in the state of the art of reliability of electronic materials and devices and provide fundamental understanding of basic phenomena that affect reliability. In addition, the publication is a forum for interdisciplinary studies on reliability. An overall goal is to provide leading edge/state of the art information, which is critically relevant to the creation of reliable products.