TAFF-YOLO:一种基于变压器和注意力特征融合的芯片内部缺陷检测增强YOLO模型

IF 2.5 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Wenxin Niu;Jianqiang Mei;Dawei Zhang;Yue Li;Fan Jia;Weixiang Du
{"title":"TAFF-YOLO:一种基于变压器和注意力特征融合的芯片内部缺陷检测增强YOLO模型","authors":"Wenxin Niu;Jianqiang Mei;Dawei Zhang;Yue Li;Fan Jia;Weixiang Du","doi":"10.1109/TSM.2025.3597147","DOIUrl":null,"url":null,"abstract":"Accurate and efficient detection of internal defects in chips is crucial for ensuring the reliability and yield of electronic products. However, conventional object detection models often struggle to identify such defects in ultrasonic images due to their extremely small size and low contrast. To overcome these challenges, a novel detection framework that combines image processing with a Transformer-based Attention Feature Fusion YOLO model (TAFF-YOLO) is proposed in this paper. The framework first employs image processing methods to extract individual chip images and then applies a handcrafted feature generation algorithm for data augmentation to mitigate overfitting. Subsequently, the TAFF-YOLO model is introduced for precise defect localization. Specifically, a Deformable Attention Background Suppression Module (DABSM) is integrated to enhance global contextual information and the receptive field for detecting small objects. Additionally, the feature fusion network (neck) is augmented with a ResBlock and Convolutional Block Attention Module (ResCBAM) to focus the model effectively on critical defect regions while suppressing irrelevant background noise. A Smooth Intersection over Union (SIoU) loss function further stabilizes the training and enhances localization accuracy. Experimental results from two private datasets and one public dataset demonstrate that the proposed method achieves an average precision of 90.9%, with a compact model size of 2.6 million parameters and an inference speed of 167.3 FPS, effectively balancing detection accuracy, model complexity, and processing speed. This indicates significant promise for real-time industrial chip inspection applications.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 4","pages":"876-888"},"PeriodicalIF":2.5000,"publicationDate":"2025-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"TAFF-YOLO: An Enhanced YOLO Model With Transformer and Attention Feature Fusion for Chip Internal Defect Detection\",\"authors\":\"Wenxin Niu;Jianqiang Mei;Dawei Zhang;Yue Li;Fan Jia;Weixiang Du\",\"doi\":\"10.1109/TSM.2025.3597147\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Accurate and efficient detection of internal defects in chips is crucial for ensuring the reliability and yield of electronic products. However, conventional object detection models often struggle to identify such defects in ultrasonic images due to their extremely small size and low contrast. To overcome these challenges, a novel detection framework that combines image processing with a Transformer-based Attention Feature Fusion YOLO model (TAFF-YOLO) is proposed in this paper. The framework first employs image processing methods to extract individual chip images and then applies a handcrafted feature generation algorithm for data augmentation to mitigate overfitting. Subsequently, the TAFF-YOLO model is introduced for precise defect localization. Specifically, a Deformable Attention Background Suppression Module (DABSM) is integrated to enhance global contextual information and the receptive field for detecting small objects. Additionally, the feature fusion network (neck) is augmented with a ResBlock and Convolutional Block Attention Module (ResCBAM) to focus the model effectively on critical defect regions while suppressing irrelevant background noise. A Smooth Intersection over Union (SIoU) loss function further stabilizes the training and enhances localization accuracy. Experimental results from two private datasets and one public dataset demonstrate that the proposed method achieves an average precision of 90.9%, with a compact model size of 2.6 million parameters and an inference speed of 167.3 FPS, effectively balancing detection accuracy, model complexity, and processing speed. This indicates significant promise for real-time industrial chip inspection applications.\",\"PeriodicalId\":451,\"journal\":{\"name\":\"IEEE Transactions on Semiconductor Manufacturing\",\"volume\":\"38 4\",\"pages\":\"876-888\"},\"PeriodicalIF\":2.5000,\"publicationDate\":\"2025-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Semiconductor Manufacturing\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/11121357/\",\"RegionNum\":3,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"2025/8/8 0:00:00\",\"PubModel\":\"Epub\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Semiconductor Manufacturing","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/11121357/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"2025/8/8 0:00:00","PubModel":"Epub","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

摘要

准确、高效地检测芯片内部缺陷对于保证电子产品的可靠性和良率至关重要。然而,传统的目标检测模型往往难以识别超声图像中的这些缺陷,因为它们的尺寸极小,对比度低。为了克服这些挑战,本文提出了一种将图像处理与基于变压器的注意力特征融合YOLO模型(TAFF-YOLO)相结合的新型检测框架。该框架首先采用图像处理方法提取单个芯片图像,然后应用手工特征生成算法进行数据增强以减轻过拟合。随后,引入TAFF-YOLO模型进行缺陷精确定位。具体来说,集成了一个可变形的注意背景抑制模块(DABSM)来增强全局上下文信息和接收野,以检测小物体。此外,利用ResBlock和卷积块注意模块(ResCBAM)增强特征融合网络(颈部),使模型有效地集中在关键缺陷区域,同时抑制不相关的背景噪声。SIoU (Smooth Intersection over Union)损失函数进一步稳定了训练,提高了定位精度。两个私有数据集和一个公共数据集的实验结果表明,该方法平均精度达到90.9%,模型尺寸紧凑,参数为260万个,推理速度为167.3 FPS,有效地平衡了检测精度、模型复杂度和处理速度。这表明了实时工业芯片检测应用的重大前景。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
TAFF-YOLO: An Enhanced YOLO Model With Transformer and Attention Feature Fusion for Chip Internal Defect Detection
Accurate and efficient detection of internal defects in chips is crucial for ensuring the reliability and yield of electronic products. However, conventional object detection models often struggle to identify such defects in ultrasonic images due to their extremely small size and low contrast. To overcome these challenges, a novel detection framework that combines image processing with a Transformer-based Attention Feature Fusion YOLO model (TAFF-YOLO) is proposed in this paper. The framework first employs image processing methods to extract individual chip images and then applies a handcrafted feature generation algorithm for data augmentation to mitigate overfitting. Subsequently, the TAFF-YOLO model is introduced for precise defect localization. Specifically, a Deformable Attention Background Suppression Module (DABSM) is integrated to enhance global contextual information and the receptive field for detecting small objects. Additionally, the feature fusion network (neck) is augmented with a ResBlock and Convolutional Block Attention Module (ResCBAM) to focus the model effectively on critical defect regions while suppressing irrelevant background noise. A Smooth Intersection over Union (SIoU) loss function further stabilizes the training and enhances localization accuracy. Experimental results from two private datasets and one public dataset demonstrate that the proposed method achieves an average precision of 90.9%, with a compact model size of 2.6 million parameters and an inference speed of 167.3 FPS, effectively balancing detection accuracy, model complexity, and processing speed. This indicates significant promise for real-time industrial chip inspection applications.
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来源期刊
IEEE Transactions on Semiconductor Manufacturing
IEEE Transactions on Semiconductor Manufacturing 工程技术-工程:电子与电气
CiteScore
5.20
自引率
11.10%
发文量
101
审稿时长
3.3 months
期刊介绍: The IEEE Transactions on Semiconductor Manufacturing addresses the challenging problems of manufacturing complex microelectronic components, especially very large scale integrated circuits (VLSI). Manufacturing these products requires precision micropatterning, precise control of materials properties, ultraclean work environments, and complex interactions of chemical, physical, electrical and mechanical processes.
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