在基于模型的工程工作流程中集成XtratuM和硬件加速器：METASAT方法

IF 2.6 4区计算机科学 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

Microprocessors and Microsystems Pub Date : 2026-03-01 Epub Date: 2026-02-16 DOI:10.1016/j.micpro.2026.105253

Alejandro J. Calderón , Aitor Amonarriz , Mar Hernández , Leonidas Kosmidis , Jannis Wolf , Marc Solé Bonet , Matina M. Trompouki , Mikel Segura , Peio Onaindia

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引用次数: 0

摘要

在采用工业4.0技术和严格的ECSS标准的推动下，卫星系统的复杂性日益增加，需要创新的设计方法。METASAT项目引入了一种基于模型的工程工作流程，将开放式架构硬件与先进的软件虚拟化层（如XtratuM管理程序）集成在一起，以应对这些挑战。通过利用将TASTE与MathWorks工具相结合的专用工具链，METASAT可以为硬件加速器（包括SPARROW AI加速器和Vortex GPU）提供高效的代码生成。本文提供了该项目的概述，详细介绍了它的设计方法、工具链集成，以及对增强卫星机载软件工程的贡献。通过这些创新，METASAT展示了先进的建模和自动代码生成如何降低开发成本和时间，提高系统性能，并确保未来卫星任务的竞争力和可靠性。

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Integrating XtratuM and hardware accelerators in a model-based engineering workflow: The METASAT approach

The increasing complexity of satellite systems, driven by the adoption of Industry 4.0 technologies and strict ECSS standards, demands innovative design methodologies. The METASAT project introduces a model-based engineering workflow that integrates open-architecture hardware with advanced software virtualisation layers, such as the XtratuM hypervisor, to address these challenges. By leveraging a specialised toolchain that combines TASTE with MathWorks tools, METASAT enables efficient code generation for hardware accelerators, including the SPARROW AI accelerator and the Vortex GPU. This paper provides an overview of the project, detailing its design approach, toolchain integration, and contributions towards enhancing satellite on-board software engineering. Through these innovations, METASAT demonstrates how advanced modelling and automated code generation can reduce development costs and timelines, improve system performance, and ensure the competitiveness and dependability of future satellite missions.

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来源期刊

Microprocessors and Microsystems 工程技术-工程：电子与电气

CiteScore

6.90

自引率

3.80%

发文量

204

审稿时长

172 days

期刊介绍： Microprocessors and Microsystems: Embedded Hardware Design (MICPRO) is a journal covering all design and architectural aspects related to embedded systems hardware. This includes different embedded system hardware platforms ranging from custom hardware via reconfigurable systems and application specific processors to general purpose embedded processors. Special emphasis is put on novel complex embedded architectures, such as systems on chip (SoC), systems on a programmable/reconfigurable chip (SoPC) and multi-processor systems on a chip (MPSoC), as well as, their memory and communication methods and structures, such as network-on-chip (NoC). Design automation of such systems including methodologies, techniques, flows and tools for their design, as well as, novel designs of hardware components fall within the scope of this journal. Novel cyber-physical applications that use embedded systems are also central in this journal. While software is not in the main focus of this journal, methods of hardware/software co-design, as well as, application restructuring and mapping to embedded hardware platforms, that consider interplay between software and hardware components with emphasis on hardware, are also in the journal scope.