具有新型金属层间接触的高性能三层IGZO通道栅全能薄膜晶体管的首次演示

IF 4.5 2区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Wen-Hsiang Lu;Yun-Hao Yeh;Chia-Tsong Chen;Wen-Hsin Chang;Tatsuro Maeda;Yao-Jen Lee;Yeong-Her Wang
{"title":"具有新型金属层间接触的高性能三层IGZO通道栅全能薄膜晶体管的首次演示","authors":"Wen-Hsiang Lu;Yun-Hao Yeh;Chia-Tsong Chen;Wen-Hsin Chang;Tatsuro Maeda;Yao-Jen Lee;Yeong-Her Wang","doi":"10.1109/LED.2026.3655893","DOIUrl":null,"url":null,"abstract":"For the first time, highly integrated IGZO transistors suitable for back-end-of-line (BEOL) integration are demonstrated, leveraging an in-situ ozone interfacial layer (IL) treatment before HfO<sub>2</sub> deposition. The ozone-treated gate-all-around (GAA) devices achieve an outstanding sub-threshold swing (S.S.) of 64 mV/dec at L = 150 nm, approaching the theoretical limit, and exhibit an Ion/Ioff ratio exceeding <inline-formula> <tex-math>${1}.{44}\\times {10} ^{{8}}$ </tex-math></inline-formula>. The ozone IL treatment significantly reduces oxygen vacancy (VO) concentration, enhancing channel integrity, electrostatic control, reliability, scalability, and subthreshold swing precision. This metal interlayer significantly reduces source/drain contact resistance, resulting in a <inline-formula> <tex-math>$2.3\\times $ </tex-math></inline-formula> performance enhancement for three-tier devices compared to single-tier counterparts. These combined advancements underscore the potential of IGZO GAA structures for next-generation high-performance semiconductor applications.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"47 3","pages":"621-624"},"PeriodicalIF":4.5000,"publicationDate":"2026-01-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"First Demonstration of High-Performance Three-Tier IGZO Channels Gate-All-Around Thin-Film Transistors With Novel Metal Interlayer Contact\",\"authors\":\"Wen-Hsiang Lu;Yun-Hao Yeh;Chia-Tsong Chen;Wen-Hsin Chang;Tatsuro Maeda;Yao-Jen Lee;Yeong-Her Wang\",\"doi\":\"10.1109/LED.2026.3655893\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"For the first time, highly integrated IGZO transistors suitable for back-end-of-line (BEOL) integration are demonstrated, leveraging an in-situ ozone interfacial layer (IL) treatment before HfO<sub>2</sub> deposition. The ozone-treated gate-all-around (GAA) devices achieve an outstanding sub-threshold swing (S.S.) of 64 mV/dec at L = 150 nm, approaching the theoretical limit, and exhibit an Ion/Ioff ratio exceeding <inline-formula> <tex-math>${1}.{44}\\\\times {10} ^{{8}}$ </tex-math></inline-formula>. The ozone IL treatment significantly reduces oxygen vacancy (VO) concentration, enhancing channel integrity, electrostatic control, reliability, scalability, and subthreshold swing precision. This metal interlayer significantly reduces source/drain contact resistance, resulting in a <inline-formula> <tex-math>$2.3\\\\times $ </tex-math></inline-formula> performance enhancement for three-tier devices compared to single-tier counterparts. These combined advancements underscore the potential of IGZO GAA structures for next-generation high-performance semiconductor applications.\",\"PeriodicalId\":13198,\"journal\":{\"name\":\"IEEE Electron Device Letters\",\"volume\":\"47 3\",\"pages\":\"621-624\"},\"PeriodicalIF\":4.5000,\"publicationDate\":\"2026-01-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Electron Device Letters\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/11358946/\",\"RegionNum\":2,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Electron Device Letters","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/11358946/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

摘要

首次展示了适用于后端线(BEOL)集成的高集成度IGZO晶体管,在HfO2沉积之前利用原位臭氧界面层(IL)处理。臭氧处理的栅极全能(GAA)器件在L = 150 nm处实现了64 mV/dec的亚阈值摆幅(S.S.),接近理论极限,并且离子/电离比超过${1}。{44}\乘以{10}^{{8}}$。臭氧IL处理显著降低氧空位(VO)浓度,增强通道完整性、静电控制、可靠性、可扩展性和亚阈值摆动精度。这种金属中间层显著降低了源极/漏极接触电阻,与单层器件相比,三层器件的性能提高了2.3倍。这些综合进步强调了IGZO GAA结构在下一代高性能半导体应用中的潜力。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
First Demonstration of High-Performance Three-Tier IGZO Channels Gate-All-Around Thin-Film Transistors With Novel Metal Interlayer Contact
For the first time, highly integrated IGZO transistors suitable for back-end-of-line (BEOL) integration are demonstrated, leveraging an in-situ ozone interfacial layer (IL) treatment before HfO2 deposition. The ozone-treated gate-all-around (GAA) devices achieve an outstanding sub-threshold swing (S.S.) of 64 mV/dec at L = 150 nm, approaching the theoretical limit, and exhibit an Ion/Ioff ratio exceeding ${1}.{44}\times {10} ^{{8}}$ . The ozone IL treatment significantly reduces oxygen vacancy (VO) concentration, enhancing channel integrity, electrostatic control, reliability, scalability, and subthreshold swing precision. This metal interlayer significantly reduces source/drain contact resistance, resulting in a $2.3\times $ performance enhancement for three-tier devices compared to single-tier counterparts. These combined advancements underscore the potential of IGZO GAA structures for next-generation high-performance semiconductor applications.
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来源期刊
IEEE Electron Device Letters
IEEE Electron Device Letters 工程技术-工程:电子与电气
CiteScore
8.20
自引率
10.20%
发文量
551
审稿时长
1.4 months
期刊介绍: IEEE Electron Device Letters publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors.
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