布局对多通道finfet热度量的影响

IF 1.4 4区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Lisa Tondelli , Andries J. Scholten , Thanh Viet Dinh , Luca Selmi
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引用次数: 0

摘要

由于其高性能和可扩展性,FinFET技术被广泛应用于先进的数字、射频和模拟应用。然而,非平面结构引入了增加的电寄生和自热效应(SHEs),这可能会降低器件的可靠性和性能。我们通过模拟分析了四种采用实际工艺规则设计的FinFET布局的热行为,重点关注射频应用所需的大型FinFET阵列边界的晶体管通道。研究结果强调了FinFET结构的关键热权衡,并提出了平衡静态和动态自热的方法,以获得最佳性能和限制过温。
本文章由计算机程序翻译,如有差异,请以英文原文为准。

Layout effects on the thermal metrics of multichannel FinFETs

Layout effects on the thermal metrics of multichannel FinFETs
FinFET technology is widely used for advanced digital, RF, and analog applications due to its high performance and scalability. However, the non-planar architecture introduces increased electrical parasitics and self-heating effects (SHEs), which can degrade device reliability and performance.
We analyze, by simulation, the thermal behavior of four FinFET layouts designed with realistic process rules, focusing on transistor channels at the boundary of the large FinFET arrays required by RF applications. The findings highlight key thermal trade-offs of FinFET structures and suggest ways to balance static and dynamic self-heating for optimum performance and limited overtemperature.
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来源期刊
Solid-state Electronics
Solid-state Electronics 物理-工程:电子与电气
CiteScore
3.00
自引率
5.90%
发文量
212
审稿时长
3 months
期刊介绍: It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.
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