铁电场效应晶体管中的第一开关效应

IF 2.3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Priyankka Ravikumar;Prasanna Venkatesan;Chinsung Park;Nashrah Afroze;Mengkun Tian;Winston Chern;Suman Datta;Shimeng Yu;Souvik Mahapatra;Asif Khan
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引用次数: 0

摘要

在这项工作中,对铁电场效应晶体管(FEFET)进行了系统的表征,并与具有等效氧化物厚度的等效标准MOSFET进行了比较。我们发现这两种器件,具有硅通道,表现出相似的原始状态转移特性,但耐久性特性截然不同。与MOSFET相比,ffet在第一个写脉冲中显示出亚阈值摆幅的显著增加。在此基础上,我们发现这个第一个写脉冲(周期1)产生的陷阱超过了fet中疲劳循环期间产生的陷阱总数的一半。我们称之为“第一次开关效应”。此外,通过一步一步地极化原始ffet,我们证明了在第一次开关期间,开关极化与界面陷阱密度之间的直接相关性。通过电荷泵送测量,我们还观察到持续循环产生的陷阱更多地朝向堆叠的主体,远离fefet中的Si/SiO2界面。我们确定:(1)第一次开关效应导致Si/SiO2界面附近大约50%的陷阱密度(Nit),直到记忆窗口关闭;(2)进一步的双极循环导致在fet中Si/SiO2界面处和远离界面处产生陷阱。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
The First Switch Effect in Ferroelectric Field-Effect Transistors
In this work, a ferroelectric field-effect transistor (FEFET) is systematically characterized and compared with an equivalent standard MOSFET with an equivalent oxide thickness. We show that these two devices, with a silicon channel, exhibit similar pristine state transfer characteristics but starkly different endurance characteristics. In contrast to the MOSFET, the FEFET shows a significant increase in sub-threshold swing in the first write pulse. Based on this, we reveal that this first write pulse (cycle 1) generates more than half of the total traps generated during the fatigue cycling in FEFETs. We call this the “First Switch Effect”. Further, by polarizing a pristine FEFET step by step, we demonstrate a direct correlation between the switched polarization and interface trap density during the first switch. Through charge pumping measurements, we also observe that continued cycling generates traps more towards the bulk of the stack, away from the Si/SiO2 interface in FEFETs. We establish that: (1) the first switch effect leads to approximately 50% of the total trap density (Nit) near the Si/SiO2 interface until memory window closure; and (2) further bipolar cycling leads to trap generation both at and away from Si/SiO2 interface in FEFETs.
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来源期刊
IEEE Transactions on Device and Materials Reliability
IEEE Transactions on Device and Materials Reliability 工程技术-工程:电子与电气
CiteScore
4.80
自引率
5.00%
发文量
71
审稿时长
6-12 weeks
期刊介绍: The scope of the publication includes, but is not limited to Reliability of: Devices, Materials, Processes, Interfaces, Integrated Microsystems (including MEMS & Sensors), Transistors, Technology (CMOS, BiCMOS, etc.), Integrated Circuits (IC, SSI, MSI, LSI, ULSI, ELSI, etc.), Thin Film Transistor Applications. The measurement and understanding of the reliability of such entities at each phase, from the concept stage through research and development and into manufacturing scale-up, provides the overall database on the reliability of the devices, materials, processes, package and other necessities for the successful introduction of a product to market. This reliability database is the foundation for a quality product, which meets customer expectation. A product so developed has high reliability. High quality will be achieved because product weaknesses will have been found (root cause analysis) and designed out of the final product. This process of ever increasing reliability and quality will result in a superior product. In the end, reliability and quality are not one thing; but in a sense everything, which can be or has to be done to guarantee that the product successfully performs in the field under customer conditions. Our goal is to capture these advances. An additional objective is to focus cross fertilized communication in the state of the art of reliability of electronic materials and devices and provide fundamental understanding of basic phenomena that affect reliability. In addition, the publication is a forum for interdisciplinary studies on reliability. An overall goal is to provide leading edge/state of the art information, which is critically relevant to the creation of reliable products.
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