针对低表面粗糙度的三维结构优化基于十字线的高通量i线灰度投影光刻技术

IF 3.1 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
S. Schermer , J. Bieling , S. DeMoor , A. Zanzal , P. Reynolds , C. Helke , J. Bonitz , A. Voigt , D. Reuter
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引用次数: 0

摘要

本文采用了一种基于线线投影的灰度步进光刻技术,对成像结果进行了分析,并对光刻工艺进行了优化,以获得低表面粗糙度的灰度图像。这里使用了低对比度抗蚀剂ma-P 1211G, ma-P 1200G灰度抗蚀剂系列的一种,来自微抗蚀剂技术和来自基准技术的定制灰度线。测量了抗蚀剂的自旋曲线、对比曲线和层均匀性。生成的灰度结构的低表面粗糙度很重要,因为粗糙度将在随后的蚀刻步骤中作为图案转移而转移。研究了光刻液显影后像素尺寸对光刻液粗糙度和结构保真度的影响。因此,为了利用原子力显微镜测量暴露和发育结构的粗糙度,我们将专用的粗糙度垫块集成到光镜设计中。在评价抗蚀剂粗糙度的基础上,对不同的退火步骤进行了DOE研究,以便在显影后使抗蚀剂表面光滑。确定了理想的退火或平滑温度,以降低抗蚀剂粗糙度,同时保持/保持组织保真度。
本文章由计算机程序翻译,如有差异,请以英文原文为准。

Optimizing reticle based high throughput i-line grayscale projection lithography for 3D structures with low surface roughness

Optimizing reticle based high throughput i-line grayscale projection lithography for 3D structures with low surface roughness
In this work a reticle based i-line projection grayscale stepper lithography is applied, the patterning results are analyzed and the lithographic process is optimized to obtain low surface roughness grayscale pattern. Here the low contrast resist ma-P 1211G, one type of the ma-P 1200G grayscale resist series, from micro resist technology and tailored grayscale reticles from benchmark technologies are used. The spin curve, contrast curve and layer homogeneity of the resist were measured. A low surface roughness of the generated grayscale structures is important, because the roughness will be transferred during subsequent etching steps as pattern transfer. The impact of the pixel size (within the reticle) on the resist roughness and structure fidelity after resist development was investigated. Therefore, to measure the roughness of exposed and developed structures by AFM, dedicated roughness pads were integrated into the reticle design. After evaluation of the resist roughness a DOE study for different annealing steps in order to smoothen the resist surface after development was conducted. The ideal annealing or smoothening temperature was determined to reduce the resist roughness and preserve/ retain the structure fidelity at the same time.
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来源期刊
Micro and Nano Engineering
Micro and Nano Engineering Engineering-Electrical and Electronic Engineering
CiteScore
3.30
自引率
0.00%
发文量
67
审稿时长
80 days
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