300毫米高电阻硅衬底的集成挑战

IF 2.3 3区工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC

IEEE Transactions on Semiconductor Manufacturing Pub Date : 2025-03-05 DOI:10.1109/TSM.2025.3567206

A. Abbadie;A. Desse;K. Melhem;S. Dario Mariani;D. Fagiani;P. Zuliani;F. Faller

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引用次数: 0

摘要

介绍了300mm高电阻率奇克拉尔斯基硅（Cz-Si）晶圆经过优化热处理后的研究进展。由于热供体现象，电阻率监测的挑战被强调。提出了一种基于多种计量技术相结合的新协议。这种方法至关重要，因为在450°C退火过程中形成的称为热供体（TD）的氧相关缺陷在各种衬底上具有电活性：n型通常用于绝缘栅双极晶体管（IGBT）， p型用于例如射频（RF）技术。我们表明，这些td会导致电阻率损失，并根据衬底掺杂的不同而具有不同的行为，并确认这些td对器件性能的有害影响。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Integration Challenges on 300-mm High Resistivity Silicon Substrates

A review of 300mm high-resistivity Czochralski silicon (Cz-Si) wafers after optimized thermal treatments, is presented. The challenge of resistivity monitoring due to the thermal donors phenomenon is highlighted. A new protocol based on the combination of several metrology techniques is proposed. Such a methodology is crucial as oxygen-related defects called thermal donors (TD) formed during 450°C anneals are electrically active across various substrates: n-type used typically in insulated-gate bipolar transistors (IGBT) and p-type used for example in radiofrequency (RF)-based technologies. We show that such TDs result in resistivity loss, with different behavior depending on substrate doping, and confirm the detrimental impact of these TDs on devices performances.

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来源期刊

IEEE Transactions on Semiconductor Manufacturing 工程技术-工程：电子与电气

CiteScore

5.20

自引率

11.10%

发文量

101

审稿时长

3.3 months

期刊介绍： The IEEE Transactions on Semiconductor Manufacturing addresses the challenging problems of manufacturing complex microelectronic components, especially very large scale integrated circuits (VLSI). Manufacturing these products requires precision micropatterning, precise control of materials properties, ultraclean work environments, and complex interactions of chemical, physical, electrical and mechanical processes.