用于晶圆图模式分析的无监督表示学习和可解释聚类

IF 2.3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Itilekha Podder;Marco Miller;Tamas Fischl;Udo Bub
{"title":"用于晶圆图模式分析的无监督表示学习和可解释聚类","authors":"Itilekha Podder;Marco Miller;Tamas Fischl;Udo Bub","doi":"10.1109/TSM.2025.3579031","DOIUrl":null,"url":null,"abstract":"As wafer maps become increasingly complex and high-dimensional, conventional clustering methods often fail to uncover subtle but meaningful defect patterns critical for yield enhancement and fault diagnosis in semiconductor manufacturing. We present an unsupervised clustering framework tailored to wafer map analysis, combining a convolutional autoencoder for automated feature extraction with principal component analysis for dimensionality refinement. Additionally, we incorporate improved deep embedded clustering, which augments the autoencoder with a clustering-oriented Kullback-Leibler divergence loss to learn compact and confident latent representations. Using standard clustering metrics and extensive visualization, our method is evaluated on two private industrial micro-electromechanical systems datasets and the public MIR-WM811K dataset. Unlike prior approaches, we introduce a comprehensive evaluation strategy that includes (i) cluster confidence and entropy distributions to assess prediction determinism, (ii) semi-supervised scoring for structure-aware validation, and (iii) interpretable visual tools, such as SHapley Additive exPlanations maps, gradient-weighted class activation mapping overlays, and average cluster profiles to support human-in-the-loop decision-making. Results show that our framework consistently outperforms baseline methods, including pretrained visual models like DINOv2 and TIMM-ResNet, in both clustering quality and interpretability. By aligning unsupervised representations with domain-specific failure semantics, the proposed pipeline enables more transparent and actionable analysis of wafer maps. Integrating automated feature learning, probabilistic confidence modelling, and visual attribution offers a robust path toward root-cause identification and process optimization in modern semiconductor fabrication.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"38 3","pages":"693-708"},"PeriodicalIF":2.3000,"publicationDate":"2025-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Unsupervised Representation Learning and Explainable Clustering for Wafer Map Pattern Analysis\",\"authors\":\"Itilekha Podder;Marco Miller;Tamas Fischl;Udo Bub\",\"doi\":\"10.1109/TSM.2025.3579031\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"As wafer maps become increasingly complex and high-dimensional, conventional clustering methods often fail to uncover subtle but meaningful defect patterns critical for yield enhancement and fault diagnosis in semiconductor manufacturing. We present an unsupervised clustering framework tailored to wafer map analysis, combining a convolutional autoencoder for automated feature extraction with principal component analysis for dimensionality refinement. Additionally, we incorporate improved deep embedded clustering, which augments the autoencoder with a clustering-oriented Kullback-Leibler divergence loss to learn compact and confident latent representations. Using standard clustering metrics and extensive visualization, our method is evaluated on two private industrial micro-electromechanical systems datasets and the public MIR-WM811K dataset. Unlike prior approaches, we introduce a comprehensive evaluation strategy that includes (i) cluster confidence and entropy distributions to assess prediction determinism, (ii) semi-supervised scoring for structure-aware validation, and (iii) interpretable visual tools, such as SHapley Additive exPlanations maps, gradient-weighted class activation mapping overlays, and average cluster profiles to support human-in-the-loop decision-making. Results show that our framework consistently outperforms baseline methods, including pretrained visual models like DINOv2 and TIMM-ResNet, in both clustering quality and interpretability. By aligning unsupervised representations with domain-specific failure semantics, the proposed pipeline enables more transparent and actionable analysis of wafer maps. Integrating automated feature learning, probabilistic confidence modelling, and visual attribution offers a robust path toward root-cause identification and process optimization in modern semiconductor fabrication.\",\"PeriodicalId\":451,\"journal\":{\"name\":\"IEEE Transactions on Semiconductor Manufacturing\",\"volume\":\"38 3\",\"pages\":\"693-708\"},\"PeriodicalIF\":2.3000,\"publicationDate\":\"2025-06-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Semiconductor Manufacturing\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/11032105/\",\"RegionNum\":3,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Semiconductor Manufacturing","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/11032105/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

摘要

随着晶圆图变得越来越复杂和高维,传统的聚类方法往往无法发现对半导体制造中良率提高和故障诊断至关重要的细微但有意义的缺陷模式。我们提出了一种针对晶圆图分析的无监督聚类框架,结合了卷积自编码器进行自动特征提取和主成分分析进行维度细化。此外,我们还结合了改进的深度嵌入聚类,它通过面向聚类的Kullback-Leibler散度损失来增强自编码器,以学习紧凑和自信的潜在表示。使用标准聚类指标和广泛的可视化,我们的方法在两个私人工业微机电系统数据集和公共MIR-WM811K数据集上进行了评估。与之前的方法不同,我们引入了一种综合评估策略,包括(i)集群置信度和熵分布来评估预测确定性,(ii)半监督评分用于结构感知验证,以及(iii)可解释的可视化工具,如SHapley Additive exPlanations地图、梯度加权类激活映射叠加和平均集群配置文件,以支持人在环决策。结果表明,我们的框架在聚类质量和可解释性方面始终优于基线方法,包括DINOv2和TIMM-ResNet等预训练视觉模型。通过将无监督表示与特定于领域的故障语义相结合,所提出的管道可以对晶圆图进行更透明和可操作的分析。集成自动化特征学习、概率置信度建模和视觉归因为现代半导体制造的根本原因识别和工艺优化提供了一条强大的途径。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Unsupervised Representation Learning and Explainable Clustering for Wafer Map Pattern Analysis
As wafer maps become increasingly complex and high-dimensional, conventional clustering methods often fail to uncover subtle but meaningful defect patterns critical for yield enhancement and fault diagnosis in semiconductor manufacturing. We present an unsupervised clustering framework tailored to wafer map analysis, combining a convolutional autoencoder for automated feature extraction with principal component analysis for dimensionality refinement. Additionally, we incorporate improved deep embedded clustering, which augments the autoencoder with a clustering-oriented Kullback-Leibler divergence loss to learn compact and confident latent representations. Using standard clustering metrics and extensive visualization, our method is evaluated on two private industrial micro-electromechanical systems datasets and the public MIR-WM811K dataset. Unlike prior approaches, we introduce a comprehensive evaluation strategy that includes (i) cluster confidence and entropy distributions to assess prediction determinism, (ii) semi-supervised scoring for structure-aware validation, and (iii) interpretable visual tools, such as SHapley Additive exPlanations maps, gradient-weighted class activation mapping overlays, and average cluster profiles to support human-in-the-loop decision-making. Results show that our framework consistently outperforms baseline methods, including pretrained visual models like DINOv2 and TIMM-ResNet, in both clustering quality and interpretability. By aligning unsupervised representations with domain-specific failure semantics, the proposed pipeline enables more transparent and actionable analysis of wafer maps. Integrating automated feature learning, probabilistic confidence modelling, and visual attribution offers a robust path toward root-cause identification and process optimization in modern semiconductor fabrication.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
IEEE Transactions on Semiconductor Manufacturing
IEEE Transactions on Semiconductor Manufacturing 工程技术-工程:电子与电气
CiteScore
5.20
自引率
11.10%
发文量
101
审稿时长
3.3 months
期刊介绍: The IEEE Transactions on Semiconductor Manufacturing addresses the challenging problems of manufacturing complex microelectronic components, especially very large scale integrated circuits (VLSI). Manufacturing these products requires precision micropatterning, precise control of materials properties, ultraclean work environments, and complex interactions of chemical, physical, electrical and mechanical processes.
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信