{"title":"SiC衬底上p- gan栅极全gan级联HEMT的评价:直流特性和开关性能","authors":"Dian-Ying Wu;Chih-Yung Hsieh;Yi-Xian Huang;Yu-Chen Liu;Wen-Ching Hsu;Ci-Ze Li;Jia-Zhe Liu;Cheng-Yeu Wu;Meng-Chyi Wu","doi":"10.1109/JEDS.2025.3582342","DOIUrl":null,"url":null,"abstract":"This article compares p-GaN-gate all-GaN cascode devices with standalone E-mode HEMTs on SiC substrates, with a focus on double pulse testing (DPT), a critical method for evaluating switching performance under realistic operating conditions. The all-GaN cascode, featuring a gate width of 85 mm, demonstrates a current rating of 15.6 A, an on-resistance of 7.7 m<inline-formula> <tex-math>$\\Omega $ </tex-math></inline-formula>-cm2, a breakdown voltage of 970 V, and turn-on/off times of 71/52 ns, respectively. Additionally, it exhibits switching energy losses of 17/<inline-formula> <tex-math>$8.2~\\mu $ </tex-math></inline-formula>J at <inline-formula> <tex-math>$V_{DS} \\,\\, {=} \\,\\, 400$ </tex-math></inline-formula> V and <inline-formula> <tex-math>$I_{DS} \\,\\, {=} \\,\\, 1$ </tex-math></inline-formula> A. Its dynamic RDS,on is measured at <inline-formula> <tex-math>$0.7~\\Omega $ </tex-math></inline-formula> at <inline-formula> <tex-math>$V_{DS} \\,\\, {=} \\,\\, 300$ </tex-math></inline-formula> V and <inline-formula> <tex-math>$I_{DS} \\,\\, {=} \\,\\, 1$ </tex-math></inline-formula> A. The experimental results indicate a significant improvement compared to the standalone E-mode HEMT. This highlights the advantages of the all-GaN cascode in reducing dynamic resistance and enhancing switching efficiency, making it an excellent choice for high-performance applications.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"13 ","pages":"642-648"},"PeriodicalIF":2.4000,"publicationDate":"2025-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11049654","citationCount":"0","resultStr":"{\"title\":\"Evaluation of p-GaN-gate All-GaN Cascode HEMT on SiC Substrate: DC Characteristics and Switching Performance\",\"authors\":\"Dian-Ying Wu;Chih-Yung Hsieh;Yi-Xian Huang;Yu-Chen Liu;Wen-Ching Hsu;Ci-Ze Li;Jia-Zhe Liu;Cheng-Yeu Wu;Meng-Chyi Wu\",\"doi\":\"10.1109/JEDS.2025.3582342\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This article compares p-GaN-gate all-GaN cascode devices with standalone E-mode HEMTs on SiC substrates, with a focus on double pulse testing (DPT), a critical method for evaluating switching performance under realistic operating conditions. The all-GaN cascode, featuring a gate width of 85 mm, demonstrates a current rating of 15.6 A, an on-resistance of 7.7 m<inline-formula> <tex-math>$\\\\Omega $ </tex-math></inline-formula>-cm2, a breakdown voltage of 970 V, and turn-on/off times of 71/52 ns, respectively. Additionally, it exhibits switching energy losses of 17/<inline-formula> <tex-math>$8.2~\\\\mu $ </tex-math></inline-formula>J at <inline-formula> <tex-math>$V_{DS} \\\\,\\\\, {=} \\\\,\\\\, 400$ </tex-math></inline-formula> V and <inline-formula> <tex-math>$I_{DS} \\\\,\\\\, {=} \\\\,\\\\, 1$ </tex-math></inline-formula> A. Its dynamic RDS,on is measured at <inline-formula> <tex-math>$0.7~\\\\Omega $ </tex-math></inline-formula> at <inline-formula> <tex-math>$V_{DS} \\\\,\\\\, {=} \\\\,\\\\, 300$ </tex-math></inline-formula> V and <inline-formula> <tex-math>$I_{DS} \\\\,\\\\, {=} \\\\,\\\\, 1$ </tex-math></inline-formula> A. The experimental results indicate a significant improvement compared to the standalone E-mode HEMT. This highlights the advantages of the all-GaN cascode in reducing dynamic resistance and enhancing switching efficiency, making it an excellent choice for high-performance applications.\",\"PeriodicalId\":13210,\"journal\":{\"name\":\"IEEE Journal of the Electron Devices Society\",\"volume\":\"13 \",\"pages\":\"642-648\"},\"PeriodicalIF\":2.4000,\"publicationDate\":\"2025-06-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11049654\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Journal of the Electron Devices Society\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/11049654/\",\"RegionNum\":3,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Journal of the Electron Devices Society","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/11049654/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Evaluation of p-GaN-gate All-GaN Cascode HEMT on SiC Substrate: DC Characteristics and Switching Performance
This article compares p-GaN-gate all-GaN cascode devices with standalone E-mode HEMTs on SiC substrates, with a focus on double pulse testing (DPT), a critical method for evaluating switching performance under realistic operating conditions. The all-GaN cascode, featuring a gate width of 85 mm, demonstrates a current rating of 15.6 A, an on-resistance of 7.7 m$\Omega $ -cm2, a breakdown voltage of 970 V, and turn-on/off times of 71/52 ns, respectively. Additionally, it exhibits switching energy losses of 17/$8.2~\mu $ J at $V_{DS} \,\, {=} \,\, 400$ V and $I_{DS} \,\, {=} \,\, 1$ A. Its dynamic RDS,on is measured at $0.7~\Omega $ at $V_{DS} \,\, {=} \,\, 300$ V and $I_{DS} \,\, {=} \,\, 1$ A. The experimental results indicate a significant improvement compared to the standalone E-mode HEMT. This highlights the advantages of the all-GaN cascode in reducing dynamic resistance and enhancing switching efficiency, making it an excellent choice for high-performance applications.
期刊介绍:
The IEEE Journal of the Electron Devices Society (J-EDS) is an open-access, fully electronic scientific journal publishing papers ranging from fundamental to applied research that are scientifically rigorous and relevant to electron devices. The J-EDS publishes original and significant contributions relating to the theory, modelling, design, performance, and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanodevices, optoelectronics, photovoltaics, power IC''s, and micro-sensors. Tutorial and review papers on these subjects are, also, published. And, occasionally special issues with a collection of papers on particular areas in more depth and breadth are, also, published. J-EDS publishes all papers that are judged to be technically valid and original.