{"title":"一种具有双馈线匹配结构的8 ~ 16 GHz GaN非均匀分布PA,平均PAE为43.2%","authors":"Zhaowu Wang;Dexin Shi;Xinyan Li;Shu Ma;Ronglin Chen;Ze Yu;Ziao Wang;Shijie Chen;Xiaochen Tang;Yong Wang","doi":"10.1109/LSSC.2025.3587242","DOIUrl":null,"url":null,"abstract":"This letter focuses on improving power added efficiency (PAE) of high-power nonuniform distributed power amplifier (NDPA). A double feeding line matching (DFLM) structure is proposed, where a double-T-type and a <inline-formula> <tex-math>$\\pi $ </tex-math></inline-formula>-type DFLM networks are inserted into drain transmission-line (TL) and gate TL of classical designs, respectively. These optimize load/source impedance for each transistor, improving the output power and PAE. The NPDA monolithic microwave integrated circuit (MMIC) is fabricated with a commercial 0.25-<inline-formula> <tex-math>$\\mu $ </tex-math></inline-formula>m gallium nitride (GaN) process. The measurement results show that the proposed NDPA achieves output power of 37.6-to-40.2 dBm, and PAE of 37.6%-to-50.3% at 8-to-16 GHz, with the chip area of merely 3.5 mm2. The proposed NPDA outperforms the state-of-the-art broadband power amplifier (PA) in PAE with a much smaller chip area.","PeriodicalId":13032,"journal":{"name":"IEEE Solid-State Circuits Letters","volume":"8 ","pages":"201-204"},"PeriodicalIF":2.0000,"publicationDate":"2025-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Compact 8-to-16 GHz GaN Nonuniform Distributed PA With Double Feeding Line Matching Structure Presenting 43.2% Average PAE\",\"authors\":\"Zhaowu Wang;Dexin Shi;Xinyan Li;Shu Ma;Ronglin Chen;Ze Yu;Ziao Wang;Shijie Chen;Xiaochen Tang;Yong Wang\",\"doi\":\"10.1109/LSSC.2025.3587242\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This letter focuses on improving power added efficiency (PAE) of high-power nonuniform distributed power amplifier (NDPA). A double feeding line matching (DFLM) structure is proposed, where a double-T-type and a <inline-formula> <tex-math>$\\\\pi $ </tex-math></inline-formula>-type DFLM networks are inserted into drain transmission-line (TL) and gate TL of classical designs, respectively. These optimize load/source impedance for each transistor, improving the output power and PAE. The NPDA monolithic microwave integrated circuit (MMIC) is fabricated with a commercial 0.25-<inline-formula> <tex-math>$\\\\mu $ </tex-math></inline-formula>m gallium nitride (GaN) process. The measurement results show that the proposed NDPA achieves output power of 37.6-to-40.2 dBm, and PAE of 37.6%-to-50.3% at 8-to-16 GHz, with the chip area of merely 3.5 mm2. The proposed NPDA outperforms the state-of-the-art broadband power amplifier (PA) in PAE with a much smaller chip area.\",\"PeriodicalId\":13032,\"journal\":{\"name\":\"IEEE Solid-State Circuits Letters\",\"volume\":\"8 \",\"pages\":\"201-204\"},\"PeriodicalIF\":2.0000,\"publicationDate\":\"2025-07-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Solid-State Circuits Letters\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/11075825/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Solid-State Circuits Letters","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/11075825/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
摘要
本文的重点是提高大功率非均匀分布式功率放大器(NDPA)的功率附加效率(PAE)。提出了一种双馈线匹配(DFLM)结构,将双t型和$\pi $型DFLM网络分别插入经典设计的漏极输导在线(TL)和栅极输导在线(TL)中。这些优化负载/源阻抗为每个晶体管,提高输出功率和PAE。NPDA单片微波集成电路(MMIC)采用商用0.25- $\mu $ m氮化镓(GaN)工艺制备。测量结果表明,该NDPA的输出功率为37.6 ~ 40.2 dBm, PAE为37.6%-to-50.3% at 8-to-16 GHz, with the chip area of merely 3.5 mm2. The proposed NPDA outperforms the state-of-the-art broadband power amplifier (PA) in PAE with a much smaller chip area.
A Compact 8-to-16 GHz GaN Nonuniform Distributed PA With Double Feeding Line Matching Structure Presenting 43.2% Average PAE
This letter focuses on improving power added efficiency (PAE) of high-power nonuniform distributed power amplifier (NDPA). A double feeding line matching (DFLM) structure is proposed, where a double-T-type and a $\pi $ -type DFLM networks are inserted into drain transmission-line (TL) and gate TL of classical designs, respectively. These optimize load/source impedance for each transistor, improving the output power and PAE. The NPDA monolithic microwave integrated circuit (MMIC) is fabricated with a commercial 0.25-$\mu $ m gallium nitride (GaN) process. The measurement results show that the proposed NDPA achieves output power of 37.6-to-40.2 dBm, and PAE of 37.6%-to-50.3% at 8-to-16 GHz, with the chip area of merely 3.5 mm2. The proposed NPDA outperforms the state-of-the-art broadband power amplifier (PA) in PAE with a much smaller chip area.