C-SMART:辐射下神经网络性能和可靠性的预处理器

IF 1.6 4区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Anuj Justus Rajappa , Philippe Reiter , Paolo Rech , Siegfried Mercelis , Jeroen Famaey
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引用次数: 0

摘要

边缘人工智能为低功耗边缘计算平台带来了人工智能的好处,例如用于计算机视觉分析的神经网络。然而,应用和资源限制导致保护不足,可能使边缘设备容易受到环境因素的影响,例如不断射向地球的宇宙射线。这些因素可能导致比特翻转,从而影响使用这些边缘设备计算的神经网络推断的可靠性。为了解决这个问题,我们开发了条件SMART (C-SMART)预处理器,旨在回答“何时使用SMART?”,以获得可靠性和性能优势。SMART是我们之前的工作中介绍的一种可靠性改进技术,它涉及跳过对神经网络各层的零值输入执行的乘法累积操作。我们在英国牛津郡的ChipIr设施中,将C-SMART与一个包含ARM微处理器的商用裸金属系统暴露在现实世界中,类似大气的中子辐射中。我们还为性能分析进行了计时和能量测量。我们用C-SMART进行神经网络推理的实验显示,对软错误的可靠性提高了26%以上,而性能提高了35%以上。通过将C-SMART与编译器和神经网络生成器集成在一起,我们可以预见在各种COTS设备中会有这些好处。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
C-SMART: A preprocessor for neural network performance and reliability under radiation
Edge AI brings the benefits of AI, such as neural networks for computer vision analysis, to low-power edge computing platforms. However, application and resource constraints leading to inadequate protection can make edge devices vulnerable to environmental factors, such as cosmic rays that continually shower on Earth. These factors can cause bit-flips that affect the reliability of the neural network inferences computed using these edge devices. To address this issue, we developed the Conditional-SMART (C-SMART) preprocessor designed to answer the question ‘When to use SMART?’, for obtaining both reliability and performance benefits. SMART is a reliability improvement technique introduced in our previous work, which involves skipping the multiply–accumulate operations performed on the zero-valued inputs to the layers of the neural network. We demonstrated C-SMART with a commercial bare-metal system containing an ARM microprocessor by exposing the system to real-world, atmospheric-like neutron radiation using the ChipIr facility in Oxfordshire, UK. We also conducted timing and energy measurements for performance analysis. Our experiments with C-SMART for inference with a neural network revealed a reliability boost against soft errors by more than 26% while improving performance by more than 35%. We foresee these benefits in various COTS devices by integrating C-SMART with compilers and neural network generators.
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来源期刊
Microelectronics Reliability
Microelectronics Reliability 工程技术-工程:电子与电气
CiteScore
3.30
自引率
12.50%
发文量
342
审稿时长
68 days
期刊介绍: Microelectronics Reliability, is dedicated to disseminating the latest research results and related information on the reliability of microelectronic devices, circuits and systems, from materials, process and manufacturing, to design, testing and operation. The coverage of the journal includes the following topics: measurement, understanding and analysis; evaluation and prediction; modelling and simulation; methodologies and mitigation. Papers which combine reliability with other important areas of microelectronics engineering, such as design, fabrication, integration, testing, and field operation will also be welcome, and practical papers reporting case studies in the field and specific application domains are particularly encouraged. Most accepted papers will be published as Research Papers, describing significant advances and completed work. Papers reviewing important developing topics of general interest may be accepted for publication as Review Papers. Urgent communications of a more preliminary nature and short reports on completed practical work of current interest may be considered for publication as Research Notes. All contributions are subject to peer review by leading experts in the field.
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