{"title":"晶粒形貌对先进半导体封装中Cu-Cu键合界面空隙闭合的影响","authors":"Han Jiang , Yaohua Xu , Saranarayanan Ramachandran , Shuibao Liang","doi":"10.1016/j.microrel.2025.115864","DOIUrl":null,"url":null,"abstract":"<div><div>Driven by the demands of increased integration density and heterogeneous integration in the post-Moore era, Cu–Cu direct bonding has become a critical technology for enabling fine-pitch interconnects in advanced packaging. However, achieving reliable bonds remains challenging due to the existence of interfacial voids and the complex grain morphology that develops during the bonding process. In this work, a phase field model is developed and employed to investigate the effect of grain morphology on the kinetics of interfacial void closure during the Cu–Cu bonding process. Representative configurations are constructed by varying grain size and morphology in both bonded Cu pads to simulate realistic microstructural scenario. The results show that configurations with a larger number of smaller grains on both sides of the bonding structures promote faster void closure and achieve more uniform interfacial densification. This behavior is attributed to the increased presence of grain boundaries, which serve as enhanced diffusion pathways across the interface. Furthermore, the evolution of stress fields during bonding indicates that stress becomes more evenly distributed as voids close. The stress triaxiality near void regions remains below −1 throughout the closure process, demonstrating a favorable hydrostatic compressive state for void elimination. These findings provide further fundamental understanding of the mechanisms of void closure and may offer valuable guidance for improving the reliability of Cu–Cu bonding in advanced packaging applications.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"173 ","pages":"Article 115864"},"PeriodicalIF":1.6000,"publicationDate":"2025-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Grain morphology effect on interfacial void closure in Cu–Cu bonding for advanced semiconductor packaging\",\"authors\":\"Han Jiang , Yaohua Xu , Saranarayanan Ramachandran , Shuibao Liang\",\"doi\":\"10.1016/j.microrel.2025.115864\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><div>Driven by the demands of increased integration density and heterogeneous integration in the post-Moore era, Cu–Cu direct bonding has become a critical technology for enabling fine-pitch interconnects in advanced packaging. However, achieving reliable bonds remains challenging due to the existence of interfacial voids and the complex grain morphology that develops during the bonding process. In this work, a phase field model is developed and employed to investigate the effect of grain morphology on the kinetics of interfacial void closure during the Cu–Cu bonding process. Representative configurations are constructed by varying grain size and morphology in both bonded Cu pads to simulate realistic microstructural scenario. The results show that configurations with a larger number of smaller grains on both sides of the bonding structures promote faster void closure and achieve more uniform interfacial densification. This behavior is attributed to the increased presence of grain boundaries, which serve as enhanced diffusion pathways across the interface. Furthermore, the evolution of stress fields during bonding indicates that stress becomes more evenly distributed as voids close. The stress triaxiality near void regions remains below −1 throughout the closure process, demonstrating a favorable hydrostatic compressive state for void elimination. These findings provide further fundamental understanding of the mechanisms of void closure and may offer valuable guidance for improving the reliability of Cu–Cu bonding in advanced packaging applications.</div></div>\",\"PeriodicalId\":51131,\"journal\":{\"name\":\"Microelectronics Reliability\",\"volume\":\"173 \",\"pages\":\"Article 115864\"},\"PeriodicalIF\":1.6000,\"publicationDate\":\"2025-07-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Microelectronics Reliability\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S002627142500277X\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Reliability","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S002627142500277X","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Grain morphology effect on interfacial void closure in Cu–Cu bonding for advanced semiconductor packaging
Driven by the demands of increased integration density and heterogeneous integration in the post-Moore era, Cu–Cu direct bonding has become a critical technology for enabling fine-pitch interconnects in advanced packaging. However, achieving reliable bonds remains challenging due to the existence of interfacial voids and the complex grain morphology that develops during the bonding process. In this work, a phase field model is developed and employed to investigate the effect of grain morphology on the kinetics of interfacial void closure during the Cu–Cu bonding process. Representative configurations are constructed by varying grain size and morphology in both bonded Cu pads to simulate realistic microstructural scenario. The results show that configurations with a larger number of smaller grains on both sides of the bonding structures promote faster void closure and achieve more uniform interfacial densification. This behavior is attributed to the increased presence of grain boundaries, which serve as enhanced diffusion pathways across the interface. Furthermore, the evolution of stress fields during bonding indicates that stress becomes more evenly distributed as voids close. The stress triaxiality near void regions remains below −1 throughout the closure process, demonstrating a favorable hydrostatic compressive state for void elimination. These findings provide further fundamental understanding of the mechanisms of void closure and may offer valuable guidance for improving the reliability of Cu–Cu bonding in advanced packaging applications.
期刊介绍:
Microelectronics Reliability, is dedicated to disseminating the latest research results and related information on the reliability of microelectronic devices, circuits and systems, from materials, process and manufacturing, to design, testing and operation. The coverage of the journal includes the following topics: measurement, understanding and analysis; evaluation and prediction; modelling and simulation; methodologies and mitigation. Papers which combine reliability with other important areas of microelectronics engineering, such as design, fabrication, integration, testing, and field operation will also be welcome, and practical papers reporting case studies in the field and specific application domains are particularly encouraged.
Most accepted papers will be published as Research Papers, describing significant advances and completed work. Papers reviewing important developing topics of general interest may be accepted for publication as Review Papers. Urgent communications of a more preliminary nature and short reports on completed practical work of current interest may be considered for publication as Research Notes. All contributions are subject to peer review by leading experts in the field.