利用AlOₓ层插入提高铁电ScAlN非易失性存储器的可靠性

IF 4.1 2区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Rui Wang;Ping Wang;Haotian Ye;Ran Feng;Xifan Xu;Bingxuan An;Yuzhi Deng;Fang Liu;Bowen Sheng;Tao Wang;Xiantong Zheng;Bo Shen;Xinqiang Wang
{"title":"利用AlOₓ层插入提高铁电ScAlN非易失性存储器的可靠性","authors":"Rui Wang;Ping Wang;Haotian Ye;Ran Feng;Xifan Xu;Bingxuan An;Yuzhi Deng;Fang Liu;Bowen Sheng;Tao Wang;Xiantong Zheng;Bo Shen;Xinqiang Wang","doi":"10.1109/LED.2025.3563098","DOIUrl":null,"url":null,"abstract":"Ferroelectric non-volatile memory (FeNVM) is gaining significant attention for its potential applications in data storage and neuromorphic computing. Among the promising materials for next-generation FeNVM, scandium aluminum nitride (ScAlN), has garnered attention due to its favorable ferroelectric properties and compatibility with existing Si and GaN semiconductor platforms, as well as CMOS technology. However, current ScAlN-based FeNVMs have been limited by a low Vb/Vsw(breakdown voltage to polarization switching voltage ratio) figure of merit (FOM) and inadequate endurance, hindering their widespread adoption. To overcome these limitations, we proposed an innovative ScAlN FeNVM architecture that incorporates an AlOx interlayer deposited via atomic layer deposition (ALD). This strategic addition significantly enhances the device’s performance, achieving a competitive Vb/Vsw FOM of 1.7 and extending the endurance to up to <inline-formula> <tex-math>$10^{{6}}$ </tex-math></inline-formula> write-erase cycles. Furthermore, our design demonstrates scalability, as evidenced by the successful integration of a 20-nm-thick ScAlN layer, which supports high-density integration in future devices.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 7","pages":"1107-1110"},"PeriodicalIF":4.1000,"publicationDate":"2025-04-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Enhancing Reliability in Ferroelectric ScAlN Non-Volatile Memory With AlOₓ Layer Insertion\",\"authors\":\"Rui Wang;Ping Wang;Haotian Ye;Ran Feng;Xifan Xu;Bingxuan An;Yuzhi Deng;Fang Liu;Bowen Sheng;Tao Wang;Xiantong Zheng;Bo Shen;Xinqiang Wang\",\"doi\":\"10.1109/LED.2025.3563098\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Ferroelectric non-volatile memory (FeNVM) is gaining significant attention for its potential applications in data storage and neuromorphic computing. Among the promising materials for next-generation FeNVM, scandium aluminum nitride (ScAlN), has garnered attention due to its favorable ferroelectric properties and compatibility with existing Si and GaN semiconductor platforms, as well as CMOS technology. However, current ScAlN-based FeNVMs have been limited by a low Vb/Vsw(breakdown voltage to polarization switching voltage ratio) figure of merit (FOM) and inadequate endurance, hindering their widespread adoption. To overcome these limitations, we proposed an innovative ScAlN FeNVM architecture that incorporates an AlOx interlayer deposited via atomic layer deposition (ALD). This strategic addition significantly enhances the device’s performance, achieving a competitive Vb/Vsw FOM of 1.7 and extending the endurance to up to <inline-formula> <tex-math>$10^{{6}}$ </tex-math></inline-formula> write-erase cycles. Furthermore, our design demonstrates scalability, as evidenced by the successful integration of a 20-nm-thick ScAlN layer, which supports high-density integration in future devices.\",\"PeriodicalId\":13198,\"journal\":{\"name\":\"IEEE Electron Device Letters\",\"volume\":\"46 7\",\"pages\":\"1107-1110\"},\"PeriodicalIF\":4.1000,\"publicationDate\":\"2025-04-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Electron Device Letters\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10972114/\",\"RegionNum\":2,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Electron Device Letters","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10972114/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

摘要

铁电非易失性存储器(FeNVM)因其在数据存储和神经形态计算方面的潜在应用而受到广泛关注。在下一代FeNVM的有前途的材料中,氮化钪铝(ScAlN)由于其良好的铁电性能和与现有Si和GaN半导体平台以及CMOS技术的兼容性而引起了人们的关注。然而,目前基于scaln的fenvm受到低击穿电压与极化开关电压比(Vb/Vsw)优值(FOM)和续航能力不足的限制,阻碍了它们的广泛应用。为了克服这些限制,我们提出了一种创新的ScAlN FeNVM架构,该架构包含通过原子层沉积(ALD)沉积的AlOx层间层。这一战略性的添加显著提高了器件的性能,实现了1.7的具有竞争力的Vb/Vsw FOM,并将持久时间延长到高达$10^{{6}}$的写擦周期。此外,我们的设计具有可扩展性,成功集成了20nm厚的ScAlN层,支持未来设备的高密度集成。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Enhancing Reliability in Ferroelectric ScAlN Non-Volatile Memory With AlOₓ Layer Insertion
Ferroelectric non-volatile memory (FeNVM) is gaining significant attention for its potential applications in data storage and neuromorphic computing. Among the promising materials for next-generation FeNVM, scandium aluminum nitride (ScAlN), has garnered attention due to its favorable ferroelectric properties and compatibility with existing Si and GaN semiconductor platforms, as well as CMOS technology. However, current ScAlN-based FeNVMs have been limited by a low Vb/Vsw(breakdown voltage to polarization switching voltage ratio) figure of merit (FOM) and inadequate endurance, hindering their widespread adoption. To overcome these limitations, we proposed an innovative ScAlN FeNVM architecture that incorporates an AlOx interlayer deposited via atomic layer deposition (ALD). This strategic addition significantly enhances the device’s performance, achieving a competitive Vb/Vsw FOM of 1.7 and extending the endurance to up to $10^{{6}}$ write-erase cycles. Furthermore, our design demonstrates scalability, as evidenced by the successful integration of a 20-nm-thick ScAlN layer, which supports high-density integration in future devices.
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来源期刊
IEEE Electron Device Letters
IEEE Electron Device Letters 工程技术-工程:电子与电气
CiteScore
8.20
自引率
10.20%
发文量
551
审稿时长
1.4 months
期刊介绍: IEEE Electron Device Letters publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors.
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