M. Perrosé , P. Acosta , J. Lugo-Alvarez , A.M. Papon , X. Garros , J.P. Raskin
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Low-loss RF substrate compatible with FD-SOI integration using Si+ implantation
The fabrication of localized passivation layers combining Si+ ion implantation and thermal annealing was explored. Using metallic coplanar waveguides, key performance metrics such as harmonic distortion and effective resistivity were extracted and analyzed. We demonstrated that the post-implantation thermal annealing temperature had a significant impact on Radio-Frequency performances. The optimum RF performances were obtained at an annealing temperature of 600 °C. This behavior was explained with photoluminescence and TEM characterization that revealed the presence of interstitial clusters. As it can be used locally, this method should enable the co-integration of Fully Depleted Silicon-on-Insulator (FD-SOI) technology with high-quality RF circuitry, leveraging the advantageous HR properties of the base Si substrate.
期刊介绍:
It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.