Enhancing the performance in p-type SnO TFTs through SiC co-sputtering and oxygen vacancy control

The realization of high-performance p-type oxide semiconductors is a pivotal milestone in achieving complementary metal-oxide-semiconductor (CMOS) technology based on transparent electronics. However, the thermodynamic instability of the Sn²⁺ oxidation state and the prevalence of oxygen vacancies in SnO thin films critically hinder their electronic performance. In this study, we present a novel strategy to enhance the structural and electrical properties of p-type SnO thin-film transistors (TFTs) through co-sputtering with silicon carbide (SiC), followed by high-vacuum post-deposition annealing (HVPDA). By leveraging the high bond dissociation energies of Si–O and C–O, oxygen vacancies were effectively suppressed, thereby stabilizing the metastable Sn²⁺ state and promoting the formation of phase-pure SnO. Structural analyses via X-ray diffraction and Raman spectroscopy confirmed the selective crystallization of SnO without the emergence of SnO₂ or metallic Sn phases, particularly at an optimized annealing temperature of 300 °C. Hall effect measurements demonstrated a clear trend of reduced carrier density and enhanced hole mobility (up to 2.41 cm²/V·s) with increasing SiC concentration. The fabricated back-gated TFTs showed robust p-type conduction, achieving a peak field-effect mobility of 1.5 cm²/V·s, and I_ON/I_OFF ratio exceeding 3.7 × 10⁴, alongside enhanced subthreshold behavior. These findings highlight the synergistic role of SiC co-sputtering and HVPDA in tailoring the microstructure and defect landscape of SnO-based semiconductors, establishing a promising pathway for the next generation of high-performance, transparent, p-type oxide TFTs.