突破障碍:超低电压下双极场效应晶体管中金介导剥离的厘米级单层WSe2

IF 5.3 2区 材料科学 Q2 MATERIALS SCIENCE, MULTIDISCIPLINARY
Sarah Grützmacher, Wenkai Liu, Max Heyl, Patrick Asalem, Norbert Koch, Emil J. W. List-Kratochvil, Giovanni Ligorio
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引用次数: 0

摘要

过渡金属二硫族化合物(TMDCs)在CMOS技术中是很有前途的硅的半导体替代品。它们的分层特性允许在不降低电性能的情况下缩放到单层(1L),从而使场效应晶体管(fet)进一步小型化。像WSe2这样的TMDCs表现出双极性传输,允许在单个薄片上制造p型和n型器件,简化了电路设计。因此,双极、大面积、高质量的1L-WSe2是非常可取的。在这里,利用大的、高质量的WSe2母晶体,通过热活化金介导的TMDC剥离,实现了厘米尺度的剥离1L- wse2,达到1L面积达20 mm2。通过拉曼光谱、光致发光、x射线和紫外光电子能谱以及电子输运测量对1L-WSe2的质量进行了全面研究。对于后者,基于1l - wse2的fet是在锂离子导电玻璃陶瓷衬底上制造的,作为支撑衬底和高性能栅极。在极低的栅极电压(≈2 V)下,可以实现陡至30和50 mV dec−1的亚阈值斜率,15和18 cm2的最大迁移率(⁻¹s),以及电子和空穴电流的ON/OFF比值分别为≈108和109。在15个器件上展示的性能表明,该器件架构中的1L-WSe2可以为创新的、进一步小型化的器件提供传统硅基CMOS技术的替代方案。
本文章由计算机程序翻译,如有差异,请以英文原文为准。

Breaking Barriers: Centimeter-Sized Single Layer WSe2 by Gold-Mediated Exfoliation for Ambipolar Field Effect Transistors at Ultra-Low Voltages

Breaking Barriers: Centimeter-Sized Single Layer WSe2 by Gold-Mediated Exfoliation for Ambipolar Field Effect Transistors at Ultra-Low Voltages
Transition Metal Dichalcogenides (TMDCs) are promising semiconductor alternatives to silicon in CMOS technology. Their layered nature allows scaling to a single layer (1L) without degrading electrical performance, enabling further miniaturization of field-effect transistors (FETs). TMDCs like WSe2 exhibit ambipolar transport, allowing fabrication of both p-type and n-type devices on a single flake, simplifying circuit design. Ambipolar, large-area, high-quality 1L-WSe2 is therefore highly desirable. Here, centimeter-scale exfoliated 1L-WSe2 is achieved, reaching 1L areas of up to 20 mm2 via thermally activated gold-mediated TMDC exfoliation using large, high-quality WSe₂ parent crystals. The quality of 1L-WSe2 is comprehensively investigated via Raman spectroscopy, photoluminescence, X-ray, and ultraviolet photoelectron spectroscopy, as well as electronic transport measurements. For the latter, 1L-WSe2-based FETs are fabricated on lithium-ion conducting glass ceramic substrates serving as both supporting substrate and high-performance gate. Subthreshold slopes as steep as 30 and 50 mV dec−1, maximum mobilities of 15 and 18 cm2 V⁻¹ s⁻¹, and ON/OFF ratios of ≈108 and 109 for electron and hole currents, respectively, are achieved at ultra-low gate voltages (≈2 V). The performance, demonstrated across 15 devices, suggests that 1L-WSe2 in this device architecture can pave the way toward providing an alternative to conventional silicon-based CMOS technology for innovative, further miniaturized devices.
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来源期刊
Advanced Electronic Materials
Advanced Electronic Materials NANOSCIENCE & NANOTECHNOLOGYMATERIALS SCIE-MATERIALS SCIENCE, MULTIDISCIPLINARY
CiteScore
11.00
自引率
3.20%
发文量
433
期刊介绍: Advanced Electronic Materials is an interdisciplinary forum for peer-reviewed, high-quality, high-impact research in the fields of materials science, physics, and engineering of electronic and magnetic materials. It includes research on physics and physical properties of electronic and magnetic materials, spintronics, electronics, device physics and engineering, micro- and nano-electromechanical systems, and organic electronics, in addition to fundamental research.
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