用于Sub-1V DRAM的带接地预充和电荷转移预传感的单端偏移补偿位线感测放大器

IF 2 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Solid-State Circuits Letters Pub Date : 2025-04-16 DOI:10.1109/LSSC.2025.3561280

Changyoung Lee;Youngseok Park;Hyunchul Yoon;Seryeong Yoon;Donggeon Kim;Bokyeon Won;Junhwa Song;Injae Bae;Jae-Joon Song;Kyuchang Kang;Jaehyuk Kim;Kyungrak Cho;Incheol Nam;Jungdon Ihm;Younghun Seo;Changsik Yoo;Sangjun Hwang

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引用次数: 0

摘要

本文介绍了一种带接地预充位线感测放大器（BLSA）的单端偏移补偿（SEOC）电路。它使用接地（GND）预充（PRE）配置来克服其有限的净空余量。利用电荷转移放大的单端拓扑可以消除冗余的边缘块和额外的GND PRE参考电路，同时保持能源效率。采用25nm DRAM工艺制作了该放大器，并与偏移补偿感测放大器（OCSA）进行了比较。与OCSA相比，该BLSA在0.8 V供电电压下可以实现98%的故障比特计数（FBC）减少，并且在没有冗余边缘块的情况下实现不到1%的性能下降。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A Single-Ended Offset-Compensating Bit-Line Sense-Amplifier With Ground Precharge and Charge Transfer Pre Sensing for Sub-1V DRAM

This letter presents a single-ended offset-compensating (SEOC) with ground precharge bit-line sense amplifier (BLSA). It uses a ground (GND) precharge (PRE) configuration to overcome its limited headroom margin. The single-ended topology that exploits a charge-transfer amplification can eliminate a redundant edge blocks and additional reference circuitry for GND PRE, while maintaining energy efficiency. It is fabricated in a 25-nm DRAM process and compared with offset-compensation sense amplifier (OCSA). The proposed BLSA can achieve 98% decrease in fail bit count (FBC) compared to OCSA at 0.8 V supply voltage and achieve less than 1% performance degradation without redundant edge blocks.

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来源期刊

IEEE Solid-State Circuits Letters Engineering-Electrical and Electronic Engineering

CiteScore

4.30

自引率

3.70%

发文量