A 300-GHz-Band 36-Gb/s Scalable 2-D Phased-Array CMOS Double Superheterodyne Receiver

This letter presents a near- $\lambda $ /2-antenna-pitch 2-D phased-array CMOS receiver to address the challenge of implementing sub-THz beamforming with the narrow $\lambda $ / $2~(\approx ~555~\mu $ m at 270 GHz) antenna pitch. A double superheterodyne architecture is adopted to reduce the area occupied by the 2-D RX array circuits by locating the E- and H-plane phase control circuits outside the array. Additionally, interpolated feeding is employed to enlarge the area available for the RX circuits by enabling an n-by-n array of RX elements to feed a near- $\lambda $ /2-pitch ( $2{n}$ – 1)-by-( $2{n}$ – 1) antenna array composed of main and auxiliary antennas. A 40-nm CMOS prototype with $2\times 2$ RX elements feeding $3\times 3$ antenna elements demonstrate beam scanning ranges of approximately ±20° and ±30°in the E- and H-planes, respectively, and achieves 36-Gb/s QPSK signal transmission over a distance of 5 cm.