Post Work-Function Metal Annealing Induced Significant Reliability Improvement for DDDPMOS With Dual SiO₂ Layers and Metal Gate

In this work, the effect of post work-function metal spike annealing (PWA) in N2 on the reliability of the high-voltage (HV) double-diffused drain PMOSFET (DDDPMOS) with dual SiO2 layers and metal gate (MG) is investigated. Compared to the usually employed post metal annealing (PMA), the proposed PWA is revealed to allow more nitrogen to diffuse into the in-situ steam generation (ISSG) oxide layer and eliminate oxygen vacancies. Hence, ~1500% negative bias thermal instability (NBTI) lifetime improvement for DDDPMOS is demonstrated. Slight NBTI characteristic improvement without ${I}_{\scriptstyle\mathrm {ON}}$ / ${I}_{\scriptstyle\mathrm {OFF}}$ performance degradation is also observed for the low-voltage (LV) pMOS integrated within the same die, which suggests that the PWA process can be used as a substitute for PMA and a novel solution to improve reliability for display driver chip fabrication using high-k/MG (HK/MG) technology with the effective integration of core devices with very small feature sizes and HV devices with large feature sizes and thick oxide in the same die.