Vinicius C. Do Nascimento;Seunghyun Hwang;Michael Joseph Smith;Tejas Kulkarni;Qiang Qiu;Cheng-Kok Koh;Ganesh Subbarayan;Dan Jiao
{"title":"基于多物理场的机器学习辅助芯片布局异构集成","authors":"Vinicius C. Do Nascimento;Seunghyun Hwang;Michael Joseph Smith;Tejas Kulkarni;Qiang Qiu;Cheng-Kok Koh;Ganesh Subbarayan;Dan Jiao","doi":"10.1109/TCPMT.2025.3553840","DOIUrl":null,"url":null,"abstract":"The floorplan of chiplets in heterogeneously integrated systems-in-package (SiPs) must consider multiphysics (electrical, thermal, and mechanical) performance and meet positional constraints during optimization. This article sets forth an efficient framework for chiplet floorplanning subject to positional and multiphysics-performance-based constraints. Traditional multiphysics simulations, often impractical in optimization due to high computational cost, are replaced by a high-fidelity and efficient conditional image generative model via image-based machine learning (ML). This model is accurate and capable of performing real-time prediction of multiphysics performance throughout 3-D SiPs. Utilizing the image-based ML model for fast performance assessment, we further accelerate the physical design by developing a novel and highly parallelizable dynamic rank-revealing (RR) algorithm for solving the underlying constrained optimization problem. We leverage this algorithm to optimize the position of the chiplets subject to multiphysics performance directly without floorplan representation or convexification techniques while meeting a multitude of constraints. The same ML model and constraints are also integrated into a state-of-the-art corner block list (CBL) floorplan representation under a simulated annealing (SA) optimization framework. The accuracy and efficiency of the proposed optimization method are demonstrated in the floorplanning of chiplets on an interposer subject to thermal constraints, and by comparisons against ML-assisted SA-CBL for performing the same task.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 5","pages":"959-973"},"PeriodicalIF":2.3000,"publicationDate":"2025-03-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Multiphysics-Informed ML-Assisted Chiplet Floorplanning for Heterogeneous Integration\",\"authors\":\"Vinicius C. Do Nascimento;Seunghyun Hwang;Michael Joseph Smith;Tejas Kulkarni;Qiang Qiu;Cheng-Kok Koh;Ganesh Subbarayan;Dan Jiao\",\"doi\":\"10.1109/TCPMT.2025.3553840\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The floorplan of chiplets in heterogeneously integrated systems-in-package (SiPs) must consider multiphysics (electrical, thermal, and mechanical) performance and meet positional constraints during optimization. This article sets forth an efficient framework for chiplet floorplanning subject to positional and multiphysics-performance-based constraints. Traditional multiphysics simulations, often impractical in optimization due to high computational cost, are replaced by a high-fidelity and efficient conditional image generative model via image-based machine learning (ML). This model is accurate and capable of performing real-time prediction of multiphysics performance throughout 3-D SiPs. Utilizing the image-based ML model for fast performance assessment, we further accelerate the physical design by developing a novel and highly parallelizable dynamic rank-revealing (RR) algorithm for solving the underlying constrained optimization problem. We leverage this algorithm to optimize the position of the chiplets subject to multiphysics performance directly without floorplan representation or convexification techniques while meeting a multitude of constraints. The same ML model and constraints are also integrated into a state-of-the-art corner block list (CBL) floorplan representation under a simulated annealing (SA) optimization framework. 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Multiphysics-Informed ML-Assisted Chiplet Floorplanning for Heterogeneous Integration
The floorplan of chiplets in heterogeneously integrated systems-in-package (SiPs) must consider multiphysics (electrical, thermal, and mechanical) performance and meet positional constraints during optimization. This article sets forth an efficient framework for chiplet floorplanning subject to positional and multiphysics-performance-based constraints. Traditional multiphysics simulations, often impractical in optimization due to high computational cost, are replaced by a high-fidelity and efficient conditional image generative model via image-based machine learning (ML). This model is accurate and capable of performing real-time prediction of multiphysics performance throughout 3-D SiPs. Utilizing the image-based ML model for fast performance assessment, we further accelerate the physical design by developing a novel and highly parallelizable dynamic rank-revealing (RR) algorithm for solving the underlying constrained optimization problem. We leverage this algorithm to optimize the position of the chiplets subject to multiphysics performance directly without floorplan representation or convexification techniques while meeting a multitude of constraints. The same ML model and constraints are also integrated into a state-of-the-art corner block list (CBL) floorplan representation under a simulated annealing (SA) optimization framework. The accuracy and efficiency of the proposed optimization method are demonstrated in the floorplanning of chiplets on an interposer subject to thermal constraints, and by comparisons against ML-assisted SA-CBL for performing the same task.
期刊介绍:
IEEE Transactions on Components, Packaging, and Manufacturing Technology publishes research and application articles on modeling, design, building blocks, technical infrastructure, and analysis underpinning electronic, photonic and MEMS packaging, in addition to new developments in passive components, electrical contacts and connectors, thermal management, and device reliability; as well as the manufacture of electronics parts and assemblies, with broad coverage of design, factory modeling, assembly methods, quality, product robustness, and design-for-environment.