探索针对硬件错误的超维计算鲁棒性

IF 3.6 2区 计算机科学 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Sizhe Zhang;Kyle Juretus;Xun Jiao
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引用次数: 0

摘要

脑启发的超维计算(HDC)是一种新兴的机器学习范式,利用高维空间来完成模式识别和医疗诊断等高效任务。作为深度神经网络的轻量级替代方案,HDC提供了更小的模型尺寸、更少的计算和以内存为中心的处理。然而,在医疗保健和机器人等安全关键应用程序中部署HDC,会受到硬件导致的错误的挑战。本文通过对项目记忆和联想记忆进行大量的位翻转注入实验,研究了HDC对记忆错误的鲁棒性。结果表明,某些位翻转严重降低了精度。为了解决这个问题,我们引入了超维比特翻转搜索(HD-BFS),这是一种用于识别漏洞和制作有效攻击的相似性引导方法,其中仅翻转6个关键位- 3.9%的随机比特翻转-将准确性降低到偶然水平。我们进一步提出了超维加速比特翻转搜索(HD-ABFS),它通过瞄准关键维度和最有效比特(msb)来缩小搜索空间,比HD-BFS实现高达282美元的加速。最后,我们建立了有效的保护机制来提高模型的安全性。这些见解突出了HDC对随机错误的弹性,提供了针对针对性攻击的强大防御,提高了HDC系统的安全性和可靠性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Exploring Hyperdimensional Computing Robustness Against Hardware Errors
Brain-inspired hyperdimensional computing (HDC) is an emerging machine learning paradigm leveraging high-dimensional spaces for efficient tasks like pattern recognition and medical diagnostics. As a lightweight alternative to deep neural networks, HDC offers smaller model sizes, reduced computation, and memory-centric processing. However, deploying HDC in safety-critical applications, such as healthcare and robotics, is challenged by hardware-induced errors. This paper investigates HDC's robustness to memory errors via extensive bit-flip injection experiments on item and associative memories. Results reveal that certain bit-flips severely degrade accuracy. To address this, we introduce the Hyperdimensional Bit-Flip Search (HD-BFS), a similarity-guided method for identifying vulnerabilities and crafting efficient attacks, where flipping just 6 critical bits—3.9% of random bit-flips—reduces accuracy to chance levels. We further propose Hyperdimensional Accelerated Bit-Flip Search (HD-ABFS), which narrows the search space by targeting critical dimensions and most significant bits (MSBs), achieving up to 282$\times$ speedup over HD-BFS. Finally, we develop an effective protection mechanism to enhance model safety. These insights highlight HDC's resilience to random errors, offer robust defenses against targeted attacks, and advance the security and reliability of HDC systems.
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来源期刊
IEEE Transactions on Computers
IEEE Transactions on Computers 工程技术-工程:电子与电气
CiteScore
6.60
自引率
5.40%
发文量
199
审稿时长
6.0 months
期刊介绍: The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field. It publishes papers on research in areas of current interest to the readers. These areas include, but are not limited to, the following: a) computer organizations and architectures; b) operating systems, software systems, and communication protocols; c) real-time systems and embedded systems; d) digital devices, computer components, and interconnection networks; e) specification, design, prototyping, and testing methods and tools; f) performance, fault tolerance, reliability, security, and testability; g) case studies and experimental and theoretical evaluations; and h) new and important applications and trends.
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