3D-NAND沉积过程中多介电层厚度的虚拟测量

IF 2.3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Hye Eun Sim;Min Uk Lee;Sang Jeen Hong
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引用次数: 0

摘要

随着三维(3D)垂直结构对提高3D- nand闪存设备存储容量和性能的日益重视,精确控制和预测工艺结果以最大限度地减少工艺变异性变得非常重要。在此,我们预测了使用人工智能(AI)的3D-NAND沉积工艺的氧化物/氮化物(ON)介电堆栈的层厚度。我们研究了影响多种介质厚度的关键变量,提出了减轻厚度变化的策略。基于等离子体沉积设备采集的状态变量识别(SVID)和光学发射光谱(OES)数据,构建了虚拟计量(VM)模型,并采用可解释人工智能(XAI)算法解释影响工艺结果的变量的显著性。XAI还支持人工智能预测模型的可靠性,以确定沉积的多层ON堆栈的厚度。利用SVID和OES数据的变量,预测氧化层厚度、氮化物层厚度以及氧化层和氮化物层厚度的模型分别达到了99%、88%和99%的精度。这项研究强调了开发高性能VM模型和解释半导体等离子体工艺精确过程控制预测结果的重要性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Virtual Metrology of Multiple Dielectric Layer Thickness for 3D-NAND Deposition Process
With the growing emphasis on three-dimensional (3D) vertical structures for enhancing the storage capacity and performance of 3D-NAND flash memory devices, precise control and prediction of process results to minimize process variability are important. Herein we predicted the layer thickness of an oxide/nitride (ON) dielectric stack for a 3D-NAND deposition process using artificial intelligence (AI). We investigated the key variables influencing the thicknesses of multiple dielectrics to propose strategies for mitigating thickness variation. We constructed a virtual metrology (VM) model based on status-variable identification (SVID) and optical emission spectroscopy (OES) data collected from plasma deposition equipment, and employed explainable AI (XAI) algorithms to interpret the significance of variables affecting the process results. XAI also supports the reliability of AI-predictive models for determining the thicknesses of the deposited multi-layered ON stack. Using variables derived from the SVID and OES data, the models for predicting oxide layer thickness, nitride layer thickness, and the thicknesses of both oxide and nitride layers achieved accuracies of 99%, 88% and 99%, respectively. This study highlights the importance of developing high-performance VM models and interpreting predictive outcomes for precise process control in semiconductor plasma processes.
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来源期刊
IEEE Transactions on Semiconductor Manufacturing
IEEE Transactions on Semiconductor Manufacturing 工程技术-工程:电子与电气
CiteScore
5.20
自引率
11.10%
发文量
101
审稿时长
3.3 months
期刊介绍: The IEEE Transactions on Semiconductor Manufacturing addresses the challenging problems of manufacturing complex microelectronic components, especially very large scale integrated circuits (VLSI). Manufacturing these products requires precision micropatterning, precise control of materials properties, ultraclean work environments, and complex interactions of chemical, physical, electrical and mechanical processes.
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