p-NiO/LiNiO-GaN异质结:先进器件中p-GaN的潜在替代品

IF 4.1 2区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Zheng Hao;Alessandro Floriduz;Yuan Zong;Uiho Choi;Mounir Mensi;Elison Matioli
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引用次数: 0

摘要

在这项工作中,我们介绍了通过低温沉积工艺生长的p-NiO/LiNiO堆栈,为在GaN器件中创建局部p型区域提供了有效的替代方案。该堆栈将高孔浓度p-NiO薄膜([h] $= 2\times 10^{{19}}$ cm ${}^{-{3}}$)与外延晶体p-LiNiO薄膜结合在一起,形成高质量的p型层,可以灵活地沉积并在GaN器件上进行图图化。在这里,我们通过制造p-NiO/LiNiO-GaN PiN二极管来研究p-NiO/LiNiO-GaN异质结的输运和击穿特性。该引脚二极管表现出优异的电学性能,包括低导通电压(${V} _{\text {ON}}$)为1.7 V,低比导通电阻(${}_{\text {ON}},\text {sp}}$)为1.15 m $\Omega \cdot $ cm2,击穿电压(BV)超过1000 V,可与外延GaN同质结相媲美。这些结果突出了利用导电和兼容的p-NiO/LiNiO堆栈取代p-GaN以获得高质量本地化p-n结的潜力,简化了基于gan的器件的可制造性,并使p-GaN具有挑战性的先进器件概念得以实现。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
p-NiO/LiNiO-GaN Heterojunctions: A Potential Alternative to p-GaN for Advanced Devices
In this work, we introduce a p-NiO/LiNiO stack grown via low-temperature deposition processes, offering an effective alternative for creating localized p-type regions in GaN devices. This stack combines a high hole concentration p-NiO film ([h] $= 2\times 10^{{19}}$ cm ${}^{-{3}}$ ) with an epitaxially crystalline p-LiNiO film, resulting in a high-quality p-type layer that can be flexibly deposited and patterned on GaN devices. Here, we investigate the transport and breakdown properties of the p-NiO/LiNiO-GaN heterojunction by fabricating a p-NiO/LiNiO-GaN PiN diode. The PiN diode exhibited excellent electrical performance, including a low turn-on voltage ( ${V} _{\text {ON}}$ ) of 1.7 V, a low specific on-state resistance (R ${}_{\text {ON},\text {sp}}$ ) of 1.15 m $\Omega \cdot $ cm2, and a high breakdown voltage (BV) exceeding 1000 V, comparable to those achieved with epitaxial GaN homojunctions. These results highlight the potential of utilizing conductive and compatible p-NiO/LiNiO stacks to replace p-GaN for high-quality localized p-n junctions, simplifying the manufacturability of GaN-based devices and enabling advanced device concepts where p-GaN is challenging to be implemented.
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来源期刊
IEEE Electron Device Letters
IEEE Electron Device Letters 工程技术-工程:电子与电气
CiteScore
8.20
自引率
10.20%
发文量
551
审稿时长
1.4 months
期刊介绍: IEEE Electron Device Letters publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors.
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