掺杂扩散导致的介电损耗:高掺杂多晶硅上的叠层介电可靠性

IF 5.3 2区 材料科学 Q2 MATERIALS SCIENCE, MULTIDISCIPLINARY
Shuo Wang, Zebin Kong, Jie Zhao, Shukai Guan, Ranran Zhao, Anan Ju, Kunshu Wang, Pengfei Lian
{"title":"掺杂扩散导致的介电损耗:高掺杂多晶硅上的叠层介电可靠性","authors":"Shuo Wang, Zebin Kong, Jie Zhao, Shukai Guan, Ranran Zhao, Anan Ju, Kunshu Wang, Pengfei Lian","doi":"10.1002/aelm.202500046","DOIUrl":null,"url":null,"abstract":"This study identifies a novel failure mode in silicon dioxide/silicon nitride (SiO₂/Si₃N₄) capacitors caused by dopant diffusion in heavily doped polysilicon substrates. Under identical thermal oxidation conditions, the interfacial oxide layer is significantly thinner on p type polysilicon compared to n type polysilicon. N type capacitors exhibit superior performance, with a breakdown voltage of 88 V, whereas p type capacitors demonstrate lower breakdown voltage of 51 V. The time-dependent dielectric breakdown (TDDB) analysis indicates that n type capacitors exhibit lifetimes exceeding 10 years under high-voltage stress at 125 °C. In contrast, p type capacitors demonstrate rapid failure when subjected to a voltage of 30 V. Conduction analysis reveals that Poole–Frenkel conduction dominates the stacked dielectric layers, but thinning of the interfacial oxide layer significantly increases Fowler–Nordheim tunneling, ultimately driving stacked dielectric breakdown. These findings highlight the critical role of dopant diffusion in interfacial oxide reliability and provide insights for improving the performance of high-k stacked dielectrics in heavily doped polysilicon.","PeriodicalId":110,"journal":{"name":"Advanced Electronic Materials","volume":"59 1","pages":""},"PeriodicalIF":5.3000,"publicationDate":"2025-04-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Dopant Diffusion-Induced Dielectric Breakdown: Stacked Dielectric Reliability on Heavily Doped Polysilicon\",\"authors\":\"Shuo Wang, Zebin Kong, Jie Zhao, Shukai Guan, Ranran Zhao, Anan Ju, Kunshu Wang, Pengfei Lian\",\"doi\":\"10.1002/aelm.202500046\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This study identifies a novel failure mode in silicon dioxide/silicon nitride (SiO₂/Si₃N₄) capacitors caused by dopant diffusion in heavily doped polysilicon substrates. Under identical thermal oxidation conditions, the interfacial oxide layer is significantly thinner on p type polysilicon compared to n type polysilicon. N type capacitors exhibit superior performance, with a breakdown voltage of 88 V, whereas p type capacitors demonstrate lower breakdown voltage of 51 V. The time-dependent dielectric breakdown (TDDB) analysis indicates that n type capacitors exhibit lifetimes exceeding 10 years under high-voltage stress at 125 °C. In contrast, p type capacitors demonstrate rapid failure when subjected to a voltage of 30 V. Conduction analysis reveals that Poole–Frenkel conduction dominates the stacked dielectric layers, but thinning of the interfacial oxide layer significantly increases Fowler–Nordheim tunneling, ultimately driving stacked dielectric breakdown. These findings highlight the critical role of dopant diffusion in interfacial oxide reliability and provide insights for improving the performance of high-k stacked dielectrics in heavily doped polysilicon.\",\"PeriodicalId\":110,\"journal\":{\"name\":\"Advanced Electronic Materials\",\"volume\":\"59 1\",\"pages\":\"\"},\"PeriodicalIF\":5.3000,\"publicationDate\":\"2025-04-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Advanced Electronic Materials\",\"FirstCategoryId\":\"88\",\"ListUrlMain\":\"https://doi.org/10.1002/aelm.202500046\",\"RegionNum\":2,\"RegionCategory\":\"材料科学\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"MATERIALS SCIENCE, MULTIDISCIPLINARY\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Advanced Electronic Materials","FirstCategoryId":"88","ListUrlMain":"https://doi.org/10.1002/aelm.202500046","RegionNum":2,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"MATERIALS SCIENCE, MULTIDISCIPLINARY","Score":null,"Total":0}
引用次数: 0

摘要

这项研究确定了二氧化硅/氮化硅(SiO₂/Si₃N₄)电容器中由掺杂剂在重掺杂多晶硅衬底中的扩散引起的一种新的失效模式。在相同的热氧化条件下,p型多晶硅的界面氧化层明显比n型多晶硅薄。N型电容器表现出更好的性能,击穿电压为88 V,而p型电容器的击穿电压较低,为51 V。时间相关介质击穿(TDDB)分析表明,在125°C的高压应力下,n型电容器的寿命超过10年。相反,p型电容器在受到30v电压时表现出快速失效。导电性分析表明,堆叠介质层以Poole-Frenkel导电性为主,但界面氧化层变薄显著增加了Fowler-Nordheim隧穿,最终驱动堆叠介质击穿。这些发现强调了掺杂物扩散在界面氧化物可靠性中的关键作用,并为提高高k堆叠电介质在高掺杂多晶硅中的性能提供了见解。
本文章由计算机程序翻译,如有差异,请以英文原文为准。

Dopant Diffusion-Induced Dielectric Breakdown: Stacked Dielectric Reliability on Heavily Doped Polysilicon

Dopant Diffusion-Induced Dielectric Breakdown: Stacked Dielectric Reliability on Heavily Doped Polysilicon
This study identifies a novel failure mode in silicon dioxide/silicon nitride (SiO₂/Si₃N₄) capacitors caused by dopant diffusion in heavily doped polysilicon substrates. Under identical thermal oxidation conditions, the interfacial oxide layer is significantly thinner on p type polysilicon compared to n type polysilicon. N type capacitors exhibit superior performance, with a breakdown voltage of 88 V, whereas p type capacitors demonstrate lower breakdown voltage of 51 V. The time-dependent dielectric breakdown (TDDB) analysis indicates that n type capacitors exhibit lifetimes exceeding 10 years under high-voltage stress at 125 °C. In contrast, p type capacitors demonstrate rapid failure when subjected to a voltage of 30 V. Conduction analysis reveals that Poole–Frenkel conduction dominates the stacked dielectric layers, but thinning of the interfacial oxide layer significantly increases Fowler–Nordheim tunneling, ultimately driving stacked dielectric breakdown. These findings highlight the critical role of dopant diffusion in interfacial oxide reliability and provide insights for improving the performance of high-k stacked dielectrics in heavily doped polysilicon.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
Advanced Electronic Materials
Advanced Electronic Materials NANOSCIENCE & NANOTECHNOLOGYMATERIALS SCIE-MATERIALS SCIENCE, MULTIDISCIPLINARY
CiteScore
11.00
自引率
3.20%
发文量
433
期刊介绍: Advanced Electronic Materials is an interdisciplinary forum for peer-reviewed, high-quality, high-impact research in the fields of materials science, physics, and engineering of electronic and magnetic materials. It includes research on physics and physical properties of electronic and magnetic materials, spintronics, electronics, device physics and engineering, micro- and nano-electromechanical systems, and organic electronics, in addition to fundamental research.
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信