Analytical Modeling of Eye Diagram for Jitter Estimation in Presence of Ground Bounce

This work presents an analytical model for an eye diagram to estimate jitter. The contribution is embodied in the development of a specialised analytical model to accurately estimate jitter caused by ground-bounce noise in complementary metal-oxide-semiconductor inverter circuits. This work is highly relevant in the area of high-speed very large-scale integrated circuit design as it provides significant theoretical contributions for the estimation of jitter and assessment of signal quality using eye diagrams. The input–output relationship has been utilized to derive rising transition edges. Building upon this derivation, analytical equations have been developed to predict jitter for output transitions considering falling ramp inputs in the inverter. The eye diagram model is illustrated after integrating the rising transition edges concurrent with the falling transition edges. The robust analytical framework yields consistent results, aligning closely with simulated predictions and the physical measurements using HEX inverter ICs provide validation to the proposed modeling. The comprehensive study affirms notable accuracy in the comparison of analytical, simulated, and experimental findings.