采用 InGaZnO 薄膜晶体管和 Hf₀.₅Zr₀.₅O₂ 基铁电容器的后端兼容 2T1C 存储单元

IF 2.9 2区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Yize Sun;Shucheng Zhang;Qihan Liu;Yu Li;Haoyu Lu;Xumeng Zhang;Yingfen Wei;Mengwei Si;Hao Jiang;Qi Liu
{"title":"采用 InGaZnO 薄膜晶体管和 Hf₀.₅Zr₀.₅O₂ 基铁电容器的后端兼容 2T1C 存储单元","authors":"Yize Sun;Shucheng Zhang;Qihan Liu;Yu Li;Haoyu Lu;Xumeng Zhang;Yingfen Wei;Mengwei Si;Hao Jiang;Qi Liu","doi":"10.1109/TED.2025.3529400","DOIUrl":null,"url":null,"abstract":"Back-end-of-line (BEOL) compatible and high-performance thin-film transistors (TFTs) and emer- ging memory devices trigger significant interest in their integration into 3-D computing and memory systems. In this work, we demonstrate, for the first time, the fully integrated 2T1C memory cells with InGaZnO TFTs and Hf0.5Zr0.5O2 (HZO)-based ferroelectric capacitors (FeCaps). The write and read operations of this recently pro- posed ferroelectric memory structure were systematically studied. The impacts of critical parameters on device per- formances were elucidated, including 1) applied voltage; 2) ferroelectric remnant polarization (<inline-formula> <tex-math>${P}_{\\text {r}}$ </tex-math></inline-formula>); 3) transistor threshold voltage (<inline-formula> <tex-math>${V}_{\\text {th}}$ </tex-math></inline-formula>); and 4) area ratio (AR) between the FeCap and the MOS capacitor of the Read transistor. The device with an AR of 1:8 can be operated with low voltages of 2 V for write and 2.5 V for read. Finally, the reliabilities of our fabricated 2T1C memory cells including retention (<inline-formula> <tex-math>$\\geqq 10^{{5}}$ </tex-math></inline-formula> s) and endurance (<inline-formula> <tex-math>$\\geqq 10^{{7}}$ </tex-math></inline-formula> cycles) were experimentally characterized.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"72 3","pages":"1097-1103"},"PeriodicalIF":2.9000,"publicationDate":"2025-01-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Back-End-of-Line Compatible 2T1C Memory Cell With InGaZnO Thin-Film Transistors and Hf₀.₅Zr₀.₅O₂-Based Ferroelectric Capacitors\",\"authors\":\"Yize Sun;Shucheng Zhang;Qihan Liu;Yu Li;Haoyu Lu;Xumeng Zhang;Yingfen Wei;Mengwei Si;Hao Jiang;Qi Liu\",\"doi\":\"10.1109/TED.2025.3529400\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Back-end-of-line (BEOL) compatible and high-performance thin-film transistors (TFTs) and emer- ging memory devices trigger significant interest in their integration into 3-D computing and memory systems. In this work, we demonstrate, for the first time, the fully integrated 2T1C memory cells with InGaZnO TFTs and Hf0.5Zr0.5O2 (HZO)-based ferroelectric capacitors (FeCaps). The write and read operations of this recently pro- posed ferroelectric memory structure were systematically studied. The impacts of critical parameters on device per- formances were elucidated, including 1) applied voltage; 2) ferroelectric remnant polarization (<inline-formula> <tex-math>${P}_{\\\\text {r}}$ </tex-math></inline-formula>); 3) transistor threshold voltage (<inline-formula> <tex-math>${V}_{\\\\text {th}}$ </tex-math></inline-formula>); and 4) area ratio (AR) between the FeCap and the MOS capacitor of the Read transistor. The device with an AR of 1:8 can be operated with low voltages of 2 V for write and 2.5 V for read. Finally, the reliabilities of our fabricated 2T1C memory cells including retention (<inline-formula> <tex-math>$\\\\geqq 10^{{5}}$ </tex-math></inline-formula> s) and endurance (<inline-formula> <tex-math>$\\\\geqq 10^{{7}}$ </tex-math></inline-formula> cycles) were experimentally characterized.\",\"PeriodicalId\":13092,\"journal\":{\"name\":\"IEEE Transactions on Electron Devices\",\"volume\":\"72 3\",\"pages\":\"1097-1103\"},\"PeriodicalIF\":2.9000,\"publicationDate\":\"2025-01-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Electron Devices\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10850486/\",\"RegionNum\":2,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Electron Devices","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10850486/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

摘要

本文章由计算机程序翻译,如有差异,请以英文原文为准。
Back-End-of-Line Compatible 2T1C Memory Cell With InGaZnO Thin-Film Transistors and Hf₀.₅Zr₀.₅O₂-Based Ferroelectric Capacitors
Back-end-of-line (BEOL) compatible and high-performance thin-film transistors (TFTs) and emer- ging memory devices trigger significant interest in their integration into 3-D computing and memory systems. In this work, we demonstrate, for the first time, the fully integrated 2T1C memory cells with InGaZnO TFTs and Hf0.5Zr0.5O2 (HZO)-based ferroelectric capacitors (FeCaps). The write and read operations of this recently pro- posed ferroelectric memory structure were systematically studied. The impacts of critical parameters on device per- formances were elucidated, including 1) applied voltage; 2) ferroelectric remnant polarization ( ${P}_{\text {r}}$ ); 3) transistor threshold voltage ( ${V}_{\text {th}}$ ); and 4) area ratio (AR) between the FeCap and the MOS capacitor of the Read transistor. The device with an AR of 1:8 can be operated with low voltages of 2 V for write and 2.5 V for read. Finally, the reliabilities of our fabricated 2T1C memory cells including retention ( $\geqq 10^{{5}}$ s) and endurance ( $\geqq 10^{{7}}$ cycles) were experimentally characterized.
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来源期刊
IEEE Transactions on Electron Devices
IEEE Transactions on Electron Devices 工程技术-工程:电子与电气
CiteScore
5.80
自引率
16.10%
发文量
937
审稿时长
3.8 months
期刊介绍: IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors. Tutorial and review papers on these subjects are also published and occasional special issues appear to present a collection of papers which treat particular areas in more depth and breadth.
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