长时间尺度的动态IGBT紧凑型热网模型

IF 2.3 3区工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC

IEEE Transactions on Components, Packaging and Manufacturing Technology Pub Date : 2024-12-09 DOI:10.1109/TCPMT.2024.3513323

Mingyao Ma;Qian Zhang;Weisheng Guo;Qiwei Song

{"title":"长时间尺度的动态IGBT紧凑型热网模型","authors":"Mingyao Ma;Qian Zhang;Weisheng Guo;Qiwei Song","doi":"10.1109/TCPMT.2024.3513323","DOIUrl":null,"url":null,"abstract":"The cause of failures in insulated gate bipolar transistor (IGBT) modules is primarily attributed to temperature-related factors. Accurately estimating the junction temperature of IGBT modules is crucial for enhancing their reliability. Currently, thermal network models stand as commonly used tools for estimating the junction temperature of IGBT modules. However, prevailing thermal models exhibit certain limitations in accurately predicting the junction temperature, particularly when considering the degradation of chip solder within IGBT modules. This article presents a practical degradation model of the chip solder layer, establishing a functional correlation between the chip solder degradation rate and the number of power cycles. A dynamic compact thermal network model over long time scales is established, and the method for thermal parameter extraction is discussed. The finite-element simulation and experimental results show that the dynamic compact thermal network model can accurately estimate the junction temperature.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"15 1","pages":"123-130"},"PeriodicalIF":2.3000,"publicationDate":"2024-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Dynamic IGBT Compact Thermal Network Model Over Long Time Scales\",\"authors\":\"Mingyao Ma;Qian Zhang;Weisheng Guo;Qiwei Song\",\"doi\":\"10.1109/TCPMT.2024.3513323\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The cause of failures in insulated gate bipolar transistor (IGBT) modules is primarily attributed to temperature-related factors. Accurately estimating the junction temperature of IGBT modules is crucial for enhancing their reliability. Currently, thermal network models stand as commonly used tools for estimating the junction temperature of IGBT modules. However, prevailing thermal models exhibit certain limitations in accurately predicting the junction temperature, particularly when considering the degradation of chip solder within IGBT modules. This article presents a practical degradation model of the chip solder layer, establishing a functional correlation between the chip solder degradation rate and the number of power cycles. A dynamic compact thermal network model over long time scales is established, and the method for thermal parameter extraction is discussed. The finite-element simulation and experimental results show that the dynamic compact thermal network model can accurately estimate the junction temperature.\",\"PeriodicalId\":13085,\"journal\":{\"name\":\"IEEE Transactions on Components, Packaging and Manufacturing Technology\",\"volume\":\"15 1\",\"pages\":\"123-130\"},\"PeriodicalIF\":2.3000,\"publicationDate\":\"2024-12-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Components, Packaging and Manufacturing Technology\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10786238/\",\"RegionNum\":3,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Components, Packaging and Manufacturing Technology","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10786238/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}

引用次数: 0

摘要

绝缘栅双极晶体管（IGBT）模块失效的原因主要归因于与温度有关的因素。准确估计IGBT模块的结温对提高其可靠性至关重要。目前，热网络模型是估计IGBT模块结温的常用工具。然而，目前流行的热模型在准确预测结温方面存在一定的局限性，特别是当考虑到IGBT模块内芯片焊料的退化时。本文提出了一种实用的芯片焊料层退化模型，建立了芯片焊料退化率与电源循环次数之间的函数关系。建立了长时间尺度的动态紧凑热网模型，讨论了热网参数的提取方法。有限元仿真和实验结果表明，动态紧凑热网模型能较准确地估计结温。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Dynamic IGBT Compact Thermal Network Model Over Long Time Scales

The cause of failures in insulated gate bipolar transistor (IGBT) modules is primarily attributed to temperature-related factors. Accurately estimating the junction temperature of IGBT modules is crucial for enhancing their reliability. Currently, thermal network models stand as commonly used tools for estimating the junction temperature of IGBT modules. However, prevailing thermal models exhibit certain limitations in accurately predicting the junction temperature, particularly when considering the degradation of chip solder within IGBT modules. This article presents a practical degradation model of the chip solder layer, establishing a functional correlation between the chip solder degradation rate and the number of power cycles. A dynamic compact thermal network model over long time scales is established, and the method for thermal parameter extraction is discussed. The finite-element simulation and experimental results show that the dynamic compact thermal network model can accurately estimate the junction temperature.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

IEEE Transactions on Components, Packaging and Manufacturing Technology ENGINEERING, MANUFACTURING-ENGINEERING, ELECTRICAL & ELECTRONIC

CiteScore

4.70

自引率

13.60%

发文量

203

审稿时长

3 months

期刊介绍： IEEE Transactions on Components, Packaging, and Manufacturing Technology publishes research and application articles on modeling, design, building blocks, technical infrastructure, and analysis underpinning electronic, photonic and MEMS packaging, in addition to new developments in passive components, electrical contacts and connectors, thermal management, and device reliability; as well as the manufacture of electronics parts and assemblies, with broad coverage of design, factory modeling, assembly methods, quality, product robustness, and design-for-environment.