基于忆阻器的高效贝叶斯卷积神经网络不确定性估计的分布外检测

IF 2.9 2区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Yudeng Lin;Qingtian Zhang;Bin Gao;Jianshi Tang;Han Zhao;Qi Qin;Ze Wang;He Qian;Huaqiang Wu
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引用次数: 0

摘要

利用忆阻器的非易失性和随机性,忆阻器交叉棒阵列可以有效地加速贝叶斯神经网络(BNNs)。然而,贝叶斯卷积神经网络(BCNNs)作为贝叶斯深度学习的代表算法之一,尚未使用忆阻器实现。卷积核局部权值连接的独特属性给高斯权值的构造带来了挑战。在这项工作中,开发了一种高效节能的基于记忆电阻器的BCNN概率卷积核实现方法,该方法充分利用了器件的写入和读取变化。同时,提出了一种基于贝叶斯的基于记忆电阻器的bcnn的硬件感知非原位训练方法,以便在大规模的bcnn上进一步部署。结合基于hfox的忆阻器参数,首次将忆阻器bcnn应用于分类任务和预估不确定性的out- distribution detection (OOD)。这两种忆阻器bcnn在MNIST和CIFAR10上的准确率分别为98.67%和87.81%,ROC曲线下面积(AUC)分别为0.96和0.83,表明分类和OOD检测性能与数字浮点实现相当。在分析了器件和阵列层面的各种影响(包括读变化、写变化、保持、电导权重水平和ADC位宽度)后,所提出的方法具有较高的鲁棒性。此外,与基于cmos的gpu相比,我们基于忆阻器的系统在预测周期内实现了12倍的速度提升和335倍的能效提升。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
High-Efficient Memristor-Based Bayesian Convolutional Neural Networks for Out-of-Distribution Detection by Uncertainty Estimation
By using the nonvolatile and stochastic properties of memristor, memristors crossbar arrays can efficiently accelerate Bayesian neural networks (BNNs). However, Bayesian convolutional neural networks (BCNNs), one of the representative algorithms of Bayesian deep learning, have not yet been implemented using memristors. The unique attribute of local weight connection of convolutional kernels poses a challenge in constructing Gaussian weights. In this work, a highly energy-efficient implementation method of probabilistic convolutional kernels in memristor-based BCNN is developed, which takes advantage of both the write and read variations of devices. Meanwhile, a Bayesian-based hardware-aware ex-situ training method for memristor-based BCNNs is proposed for further deployment on large-scale BCNNs. Incorporating HfOx-based memristor’s parameters, memristor BCNNs are used to demonstrate classification task and out-of-distribution detection (OOD) by estimating uncertainty for the first time. The two memristor BCNNs achieved accuracies of 98.67% on MNIST and 87.81% on CIFAR10 and area under the ROC curve (AUC) of 0.96 and 0.83, indicating comparable classification and OOD detection performance to the digital floating-point implementation. After analyzing the impact of various effects at the device and array level, including the read variation, write variation, retention, conductance weight level, and ADC bit widths, the proposed method shows high robustness. Moreover, compared with CMOS-based GPUs, our memristor-based system achieved a 12-fold speed increase and a 335-fold energy efficiency improvement during the prediction cycle.
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来源期刊
IEEE Transactions on Electron Devices
IEEE Transactions on Electron Devices 工程技术-工程:电子与电气
CiteScore
5.80
自引率
16.10%
发文量
937
审稿时长
3.8 months
期刊介绍: IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors. Tutorial and review papers on these subjects are also published and occasional special issues appear to present a collection of papers which treat particular areas in more depth and breadth.
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