三维非均质集成的大电流细粒度供电研究

IF 2.3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Sourish S. Sinha;Pouria Zaghari;Jong Eun Ryu;Bill Batchelor;Raymond A. Fillion;Douglas C. Hopkins
{"title":"三维非均质集成的大电流细粒度供电研究","authors":"Sourish S. Sinha;Pouria Zaghari;Jong Eun Ryu;Bill Batchelor;Raymond A. Fillion;Douglas C. Hopkins","doi":"10.1109/TCPMT.2024.3503599","DOIUrl":null,"url":null,"abstract":"This article demonstrates design guidelines and development of a novel 3-D heterogeneous integration (3-DHI) thin glass substrate-based half-bridge switching power module for future onboard CPU, transceivers, and so on, power delivery applications. Due to extreme space constraints in onboard power supply applications, this design will support switching frequencies of >50 MHz with power levels of >30 W. To illustrate the capabilities of this module, the detailed ANSYS finite element analysis (FEA) analysis was carried out through thermomechanical and electromagnetic simulations. Extracting thermals is a major limitation factor in a compact layout. Hence, a thermal via density and substrate thickness parametric study was conducted, and effects on the integrity of the mechanical structure were verified through the simulation-based stress analysis. Finally, to switch at very high frequencies, the power and signal loop interconnects were routed through a thin glass substrate to achieve ultralow-power and gate loop parasitics. Two significant contributions demonstrate stacking various component layers in a half-bridge power stage and system-level packaging in a vertical profile.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"14 12","pages":"2258-2270"},"PeriodicalIF":2.3000,"publicationDate":"2024-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Investigation of High Current Fine Grain Power Delivery for 3-D Heterogeneous Integration\",\"authors\":\"Sourish S. Sinha;Pouria Zaghari;Jong Eun Ryu;Bill Batchelor;Raymond A. Fillion;Douglas C. Hopkins\",\"doi\":\"10.1109/TCPMT.2024.3503599\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This article demonstrates design guidelines and development of a novel 3-D heterogeneous integration (3-DHI) thin glass substrate-based half-bridge switching power module for future onboard CPU, transceivers, and so on, power delivery applications. Due to extreme space constraints in onboard power supply applications, this design will support switching frequencies of >50 MHz with power levels of >30 W. To illustrate the capabilities of this module, the detailed ANSYS finite element analysis (FEA) analysis was carried out through thermomechanical and electromagnetic simulations. Extracting thermals is a major limitation factor in a compact layout. Hence, a thermal via density and substrate thickness parametric study was conducted, and effects on the integrity of the mechanical structure were verified through the simulation-based stress analysis. Finally, to switch at very high frequencies, the power and signal loop interconnects were routed through a thin glass substrate to achieve ultralow-power and gate loop parasitics. Two significant contributions demonstrate stacking various component layers in a half-bridge power stage and system-level packaging in a vertical profile.\",\"PeriodicalId\":13085,\"journal\":{\"name\":\"IEEE Transactions on Components, Packaging and Manufacturing Technology\",\"volume\":\"14 12\",\"pages\":\"2258-2270\"},\"PeriodicalIF\":2.3000,\"publicationDate\":\"2024-11-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Components, Packaging and Manufacturing Technology\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10759739/\",\"RegionNum\":3,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Components, Packaging and Manufacturing Technology","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10759739/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

摘要

本文演示了一种新型基于薄玻璃基板的3-D异构集成(3-DHI)半桥开关电源模块的设计指南和开发,该模块适用于未来的板载CPU、收发器等电源传输应用。由于板载电源应用的极端空间限制,该设计将支持>50 MHz的开关频率和>30 W的功率水平。为了说明该模块的功能,通过热力学和电磁仿真进行了详细的ANSYS有限元分析(FEA)分析。在紧凑的布局中,提取热液是一个主要的限制因素。因此,进行了热通孔密度和衬底厚度参数研究,并通过基于仿真的应力分析验证了它们对机械结构完整性的影响。最后,为了在非常高的频率下切换,功率和信号环路互连通过薄玻璃基板布线,以实现超低功率和门回路寄生。两个重要的贡献展示了在半桥功率级中堆叠各种组件层和在垂直剖面中封装系统级。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Investigation of High Current Fine Grain Power Delivery for 3-D Heterogeneous Integration
This article demonstrates design guidelines and development of a novel 3-D heterogeneous integration (3-DHI) thin glass substrate-based half-bridge switching power module for future onboard CPU, transceivers, and so on, power delivery applications. Due to extreme space constraints in onboard power supply applications, this design will support switching frequencies of >50 MHz with power levels of >30 W. To illustrate the capabilities of this module, the detailed ANSYS finite element analysis (FEA) analysis was carried out through thermomechanical and electromagnetic simulations. Extracting thermals is a major limitation factor in a compact layout. Hence, a thermal via density and substrate thickness parametric study was conducted, and effects on the integrity of the mechanical structure were verified through the simulation-based stress analysis. Finally, to switch at very high frequencies, the power and signal loop interconnects were routed through a thin glass substrate to achieve ultralow-power and gate loop parasitics. Two significant contributions demonstrate stacking various component layers in a half-bridge power stage and system-level packaging in a vertical profile.
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来源期刊
IEEE Transactions on Components, Packaging and Manufacturing Technology
IEEE Transactions on Components, Packaging and Manufacturing Technology ENGINEERING, MANUFACTURING-ENGINEERING, ELECTRICAL & ELECTRONIC
CiteScore
4.70
自引率
13.60%
发文量
203
审稿时长
3 months
期刊介绍: IEEE Transactions on Components, Packaging, and Manufacturing Technology publishes research and application articles on modeling, design, building blocks, technical infrastructure, and analysis underpinning electronic, photonic and MEMS packaging, in addition to new developments in passive components, electrical contacts and connectors, thermal management, and device reliability; as well as the manufacture of electronics parts and assemblies, with broad coverage of design, factory modeling, assembly methods, quality, product robustness, and design-for-environment.
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