基于导电桥接随机存取存储器开关的射频系统级封装宽带数字衰减器

IF 2.3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Zong-Rui Xu;Zhi-Yi Zhang;Lin-Sheng Wu;Jun-Fa Mao
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引用次数: 0

摘要

本文提出了一种基于宽带数字导电桥接随机存取存储器(CBRAM)的衰减器,该衰减器可用于实现可重构的射频系统级封装(sip)。在低于$120~^{\circ}$ C的加工温度下,开发了与硅衬底上的先进封装技术相适应的制造工艺。基于Nafion的CBRAM交换机与桥式t型电阻子网集成,形成单比特衰减单元格,衰减范围宽,工作带宽大。在考虑寄生效应的情况下,对钽薄膜电阻器的电阻值和布局进行了优化。设计了5-15 GHz的5位衰减器原型,该衰减器高度集成,占用面积为0.84\ × 0.84$ mm2。中心频率处的相对衰减为1.0 ~ 31.3 dB,参考状态的插入损耗为2.2 dB。在所有32种衰减状态下,回波损耗均优于10 dB。rms(均方根)衰减误差小于0.74 dB,相对带宽为100%。此外,由于采用非易失性射频开关,所提出的基于cbram的数字衰减器具有低驱动电压和无直流功耗的优点。这是一种很有前途的可重构射频sip应用技术。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Wideband Digital Attenuator Based on Conductive Bridging Random Access Memory Switches for RF System-in-Package
A wideband digital conductive bridging random access memory (CBRAM)-based attenuator is proposed in this article, which can be used to realize reconfigurable RF systems-in-package (SiPs). The fabrication process is developed under the processing temperature lower than $120~^{\circ }$ C, compatible with the advanced packaging technology on silicon substrates. The CBRAM switches based on Nafion are integrated with bridged-T-type resistor subnetworks to form single-bit attenuation unit cells, with wide attenuation range and large operating bandwidth. The resistance values and layouts of TaN thin film resistors are optimized when considering the parasitic effects. A 5-bit attenuator prototype is designed for 5–15 GHz, which is highly integrated with the occupied area of $0.84\times 0.84$ mm2. The relative attenuation is from 1.0 to 31.3 dB at the central frequency, with a 2.2-dB insertion loss of the reference state. The return loss is better than 10 dB for all the 32 attenuation states. The root mean square (rms) attenuation error is less than 0.74 dB with a relative bandwidth of 100%. Moreover, the proposed digital CBRAM-based attenuator has the advantages of low actuation voltage and no dc power consumption, due to the nonvolatile RF switches used. It is a promising technique for the application of reconfigurable RF SiPs.
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来源期刊
IEEE Transactions on Components, Packaging and Manufacturing Technology
IEEE Transactions on Components, Packaging and Manufacturing Technology ENGINEERING, MANUFACTURING-ENGINEERING, ELECTRICAL & ELECTRONIC
CiteScore
4.70
自引率
13.60%
发文量
203
审稿时长
3 months
期刊介绍: IEEE Transactions on Components, Packaging, and Manufacturing Technology publishes research and application articles on modeling, design, building blocks, technical infrastructure, and analysis underpinning electronic, photonic and MEMS packaging, in addition to new developments in passive components, electrical contacts and connectors, thermal management, and device reliability; as well as the manufacture of electronics parts and assemblies, with broad coverage of design, factory modeling, assembly methods, quality, product robustness, and design-for-environment.
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