Total Ionizing Dose Effects on DC/RF Performances of Emerging Vertical Back-Gate CMOS Platform

As the scaling down of the silicon (Si)-based transistors is reaching its physical limits, the vertical-structure complementary metal-oxide-semiconductor (VCMOS) process has emerged as a promising technology due its comparative advantages, in terms of aggressive scalability. Along these lines, in this work, an emerging nano-scale vertical back-gate (VBG) CMOS platform with gate length depending on the deposition process instead of the accuracy of the lithography process was proposed. In addition, the total ionizing dose (TID) effects on both the direct current and radio frequency characteristics of the proposed VBG MOSFETs were investigated by performing technology computer aided design (TCAD) simulations. Besides, a high integration-density inverter was implemented by the VBG CMOS platform as well. Both the DC and transient performances of the proposed inverter under TID effects were also characterized. From the simulated results it was demonstrated that although the VBG CMOS platform has the potential to be applied in digital integrated circuits (ICs) and RF ICs, the sensitivity to TID is still a problem to be mitigated. This work provides valuable guidelines for the TID-hardened design of VBG MOSFETs and circuits.