利用运算符并行性在gpu上加速DNN推理

IF 3.6 2区 计算机科学 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Aodong Chen;Fei Xu;Li Han;Yuan Dong;Li Chen;Zhi Zhou;Fangming Liu
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引用次数: 0

摘要

gpu已经成为加速深度神经网络(DNN)推理工作负载的事实上的硬件设备。然而,主流深度学习框架中传统的DNN算子顺序执行模式,即使启用了算子融合,也不能充分利用GPU资源,因为模型结构的复杂性不断增加,算子的多样性也越来越大。此外,在并行执行场景中,不适当的运算符启动顺序可能导致GPU资源浪费和运算符之间意外的性能干扰。在本文中,我们提出了一个资源感知和干扰感知的深度神经网络算子并行调度框架Opara,以加速gpu上的深度神经网络推理。具体来说,Opara首先使用CUDA Streams和CUDA Graph来自动并行执行多个操作符。为了进一步加快DNN推理,Opara利用运算符的资源需求,明智地调整gpu上的运算符启动顺序,重叠计算密集型和内存密集型运算符的执行。我们以一种非侵入式的方式实现并开源了基于PyTorch的Opara原型。具有代表性的DNN和基于transformer的模型的广泛原型实验表明,Opara在PyTorch和最先进的算子并行系统中分别优于默认的顺序CUDA Graph,分别高达$1.68\boldsymbol{\times}$和$1.29\boldsymbol{\times}$,但具有可接受的运行时开销。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Opara: Exploiting Operator Parallelism for Expediting DNN Inference on GPUs
GPUs have become the defacto hardware devices for accelerating Deep Neural Network (DNN) inference workloads. However, the conventional sequential execution mode of DNN operators in mainstream deep learning frameworks cannot fully utilize GPU resources, even with the operator fusion enabled, due to the increasing complexity of model structures and a greater diversity of operators. Moreover, the inadequate operator launch order in parallelized execution scenarios can lead to GPU resource wastage and unexpected performance interference among operators. In this paper, we propose Opara , a resource- and interference-aware DNN Op erator para llel scheduling framework to accelerate DNN inference on GPUs. Specifically, Opara first employs CUDA Streams and CUDA Graph to parallelize the execution of multiple operators automatically. To further expedite DNN inference, Opara leverages the resource demands of operators to judiciously adjust the operator launch order on GPUs, overlapping the execution of compute-intensive and memory-intensive operators. We implement and open source a prototype of Opara based on PyTorch in a non-intrusive manner. Extensive prototype experiments with representative DNN and Transformer-based models demonstrate that Opara outperforms the default sequential CUDA Graph in PyTorch and the state-of-the-art operator parallelism systems by up to $1.68\boldsymbol{\times}$ and $1.29\boldsymbol{\times}$ , respectively, yet with acceptable runtime overhead.
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来源期刊
IEEE Transactions on Computers
IEEE Transactions on Computers 工程技术-工程:电子与电气
CiteScore
6.60
自引率
5.40%
发文量
199
审稿时长
6.0 months
期刊介绍: The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field. It publishes papers on research in areas of current interest to the readers. These areas include, but are not limited to, the following: a) computer organizations and architectures; b) operating systems, software systems, and communication protocols; c) real-time systems and embedded systems; d) digital devices, computer components, and interconnection networks; e) specification, design, prototyping, and testing methods and tools; f) performance, fault tolerance, reliability, security, and testability; g) case studies and experimental and theoretical evaluations; and h) new and important applications and trends.
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