Kaihong Hou , Zhengwei Fan , Yonggui Chen , Shufeng Zhang , Yashun Wang , Xun Chen
{"title":"热-电-机耦合场下 3D-TSV 的多裂纹空间传播演化分析","authors":"Kaihong Hou , Zhengwei Fan , Yonggui Chen , Shufeng Zhang , Yashun Wang , Xun Chen","doi":"10.1016/j.mssp.2024.109128","DOIUrl":null,"url":null,"abstract":"<div><div>As an interconnected microstructure, Through-Silicon Via (TSV) play a vital role in three-dimension (3D) chip. With the improvement of interconnection density, the reliability problems origin from interface crack initiation and propagation become increasingly prominent. In this study, the effects of the crack type, crack propagation direction, current magnitude and direction on the spatial characteristic of crack propagation under thermal-electric-mechanical coupling field is deeply investigated based on 3D J-integral-based fracture mechanics method. Results shows that: 1) Crack J-integral is consistent with the variation of ambient temperature and positively correlated with the current magnitude; 2) When the current direction is same as crack propagation direction, electron holes will gradually accumulate at crack tip, which can accelerate the crack propagation rate; 3) Different cracks will present different morphological characteristics, the shell pattern cracks can be found at RDL-SiO<sub>2</sub> and Si-SiO<sub>2</sub> cracks, and the internal cracks TSV-Cu present irregular trapezoidal shape. Relevant result is hope to provide certain references for the reliability analysis and optimal design of TSV.</div></div>","PeriodicalId":18240,"journal":{"name":"Materials Science in Semiconductor Processing","volume":"187 ","pages":"Article 109128"},"PeriodicalIF":4.2000,"publicationDate":"2024-11-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Multi-crack spatial propagation evolution analysis of 3D-TSV under thermal-electric-mechanical coupling field\",\"authors\":\"Kaihong Hou , Zhengwei Fan , Yonggui Chen , Shufeng Zhang , Yashun Wang , Xun Chen\",\"doi\":\"10.1016/j.mssp.2024.109128\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><div>As an interconnected microstructure, Through-Silicon Via (TSV) play a vital role in three-dimension (3D) chip. With the improvement of interconnection density, the reliability problems origin from interface crack initiation and propagation become increasingly prominent. In this study, the effects of the crack type, crack propagation direction, current magnitude and direction on the spatial characteristic of crack propagation under thermal-electric-mechanical coupling field is deeply investigated based on 3D J-integral-based fracture mechanics method. Results shows that: 1) Crack J-integral is consistent with the variation of ambient temperature and positively correlated with the current magnitude; 2) When the current direction is same as crack propagation direction, electron holes will gradually accumulate at crack tip, which can accelerate the crack propagation rate; 3) Different cracks will present different morphological characteristics, the shell pattern cracks can be found at RDL-SiO<sub>2</sub> and Si-SiO<sub>2</sub> cracks, and the internal cracks TSV-Cu present irregular trapezoidal shape. Relevant result is hope to provide certain references for the reliability analysis and optimal design of TSV.</div></div>\",\"PeriodicalId\":18240,\"journal\":{\"name\":\"Materials Science in Semiconductor Processing\",\"volume\":\"187 \",\"pages\":\"Article 109128\"},\"PeriodicalIF\":4.2000,\"publicationDate\":\"2024-11-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Materials Science in Semiconductor Processing\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S1369800124010242\",\"RegionNum\":3,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Materials Science in Semiconductor Processing","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1369800124010242","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Multi-crack spatial propagation evolution analysis of 3D-TSV under thermal-electric-mechanical coupling field
As an interconnected microstructure, Through-Silicon Via (TSV) play a vital role in three-dimension (3D) chip. With the improvement of interconnection density, the reliability problems origin from interface crack initiation and propagation become increasingly prominent. In this study, the effects of the crack type, crack propagation direction, current magnitude and direction on the spatial characteristic of crack propagation under thermal-electric-mechanical coupling field is deeply investigated based on 3D J-integral-based fracture mechanics method. Results shows that: 1) Crack J-integral is consistent with the variation of ambient temperature and positively correlated with the current magnitude; 2) When the current direction is same as crack propagation direction, electron holes will gradually accumulate at crack tip, which can accelerate the crack propagation rate; 3) Different cracks will present different morphological characteristics, the shell pattern cracks can be found at RDL-SiO2 and Si-SiO2 cracks, and the internal cracks TSV-Cu present irregular trapezoidal shape. Relevant result is hope to provide certain references for the reliability analysis and optimal design of TSV.
期刊介绍:
Materials Science in Semiconductor Processing provides a unique forum for the discussion of novel processing, applications and theoretical studies of functional materials and devices for (opto)electronics, sensors, detectors, biotechnology and green energy.
Each issue will aim to provide a snapshot of current insights, new achievements, breakthroughs and future trends in such diverse fields as microelectronics, energy conversion and storage, communications, biotechnology, (photo)catalysis, nano- and thin-film technology, hybrid and composite materials, chemical processing, vapor-phase deposition, device fabrication, and modelling, which are the backbone of advanced semiconductor processing and applications.
Coverage will include: advanced lithography for submicron devices; etching and related topics; ion implantation; damage evolution and related issues; plasma and thermal CVD; rapid thermal processing; advanced metallization and interconnect schemes; thin dielectric layers, oxidation; sol-gel processing; chemical bath and (electro)chemical deposition; compound semiconductor processing; new non-oxide materials and their applications; (macro)molecular and hybrid materials; molecular dynamics, ab-initio methods, Monte Carlo, etc.; new materials and processes for discrete and integrated circuits; magnetic materials and spintronics; heterostructures and quantum devices; engineering of the electrical and optical properties of semiconductors; crystal growth mechanisms; reliability, defect density, intrinsic impurities and defects.