多孔硅厚度对通过电化学沉积锗到多孔硅基质并快速热退火制备的硅锗合金薄膜热电性能的影响

IF 4.2 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Nikita Grevtsov , Eugene Chubenko , Ilya Gavrilin , Dmitry Goroshko , Olga Goroshko , Ilia Tsiniaikin , Vitaly Bondarenko , Maksim Murtazin , Alexey Dronov , Sergey Gavrilov
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引用次数: 0

摘要

通过电化学方法将锗沉积到厚度为 1.5 至 10 μm 的多孔硅基质中,然后在 950 °C 的惰性气氛中进行快速热处理,形成了硅锗合金薄膜。利用扫描电镜和拉曼光谱对制作的结构进行研究,并对其导电性和热电特性进行测量后发现,当使用 5 μm 厚的多孔硅作为结构基体时,可获得最高的塞贝克系数(450 K 时为 -505 μV/K)和功率因数(400 K 时为 1950 μW/(m-K2))值。在这种条件下,由于残留多孔底层的存在,导电性、结构紊乱和与基底的电绝缘之间达到了最佳平衡,从而使薄膜的热电性能最大化成为可能。所获得的硅锗合金薄膜被认为适用于制造基于单晶硅衬底的分立和集成热电设备。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Impact of porous silicon thickness on thermoelectric properties of silicon-germanium alloy films produced by electrochemical deposition of germanium into porous silicon matrices followed by rapid thermal annealing
Silicon-germanium alloy films were formed by electrochemical deposition of germanium into porous silicon matrices with thicknesses varying from 1.5 to 10 μm followed by subsequent rapid thermal processing at 950 °C in an inert atmosphere. Study of the fabricated structures using SEM and Raman spectroscopy, as well as measurements of their electrical conductivity and thermoelectric properties revealed that the highest Seebeck coefficient (−505 μV/K at 450 K) and Power Factor (1950 μW/(m·K2) at 400 K) values were obtained when a 5 μm-thick porous silicon was used as a structural matrix. Under such conditions, an optimal balance between electrical conductivity, structural disorder and electrical insulation from the substrate is achieved due to the presence of a residual porous underlayer, making it possible to maximize the film's thermoelectric performance. The obtained silicon-germanium alloy films are deemed suitable for the fabrication of both discrete and integrated thermoelectric devices based on monocrystalline silicon substrates.
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来源期刊
Materials Science in Semiconductor Processing
Materials Science in Semiconductor Processing 工程技术-材料科学:综合
CiteScore
8.00
自引率
4.90%
发文量
780
审稿时长
42 days
期刊介绍: Materials Science in Semiconductor Processing provides a unique forum for the discussion of novel processing, applications and theoretical studies of functional materials and devices for (opto)electronics, sensors, detectors, biotechnology and green energy. Each issue will aim to provide a snapshot of current insights, new achievements, breakthroughs and future trends in such diverse fields as microelectronics, energy conversion and storage, communications, biotechnology, (photo)catalysis, nano- and thin-film technology, hybrid and composite materials, chemical processing, vapor-phase deposition, device fabrication, and modelling, which are the backbone of advanced semiconductor processing and applications. Coverage will include: advanced lithography for submicron devices; etching and related topics; ion implantation; damage evolution and related issues; plasma and thermal CVD; rapid thermal processing; advanced metallization and interconnect schemes; thin dielectric layers, oxidation; sol-gel processing; chemical bath and (electro)chemical deposition; compound semiconductor processing; new non-oxide materials and their applications; (macro)molecular and hybrid materials; molecular dynamics, ab-initio methods, Monte Carlo, etc.; new materials and processes for discrete and integrated circuits; magnetic materials and spintronics; heterostructures and quantum devices; engineering of the electrical and optical properties of semiconductors; crystal growth mechanisms; reliability, defect density, intrinsic impurities and defects.
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