形成用于场效应增强应用的可调金刚石微柱和纳米柱

IF 4.2 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Dylan M. Evans, Clint D. Frye
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引用次数: 0

摘要

我们开发了一种制造可调单晶金刚石微柱和纳米柱的工艺,其顶端宽度为 40 至 460 nm,密度为 0.5 至 53.5 个金刚石柱/μm2,高度大于 4.5 μm。退火金薄膜形成了自组装金纳米点集合蚀刻掩模。纳米点的直径和密度可通过初始薄膜厚度进行调整。使用 RIE O2 等离子体从纳米点掩模中蚀刻出金刚石柱,该等离子体在低射频功率(50 W)下对金刚石具有无限的选择性。最后,通过在 650 °C 的空气中退火,可将金刚石柱锐化至 40 nm 的尖端宽度。这些金刚石柱可用于金刚石光电阴极器件的场效应增强、N-V 中心光发射增强和抗反射涂层等应用。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Formation of tunable diamond micro- and nanopillars for field effect enhancement applications
We developed a process for the fabrication of tunable single crystal diamond micro- and nanopillars, with tip widths ranging from 40 to 460 nm, densities ranging from 0.5 to 53.5 pillars/μm2, and heights greater than 4.5 μm. A self-assembled Au nanodot ensemble etch mask was formed from an annealed Au thin film. The nanodot diameter and density can be tuned using the initial film thickness. The pillars were etched from the nanodot mask using an RIE O2 plasma, which has infinite selectivity for the diamond when applied at low RF powers (50 W). Finally, the pillars can be sharpened to ∼40 nm tip widths by annealing in air at 650 °C. These pillars can be used for applications such as field effect enhancement of diamond photocathode devices, enhancement of optical emission from N-V centers, and antireflective coatings.
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来源期刊
Materials Science in Semiconductor Processing
Materials Science in Semiconductor Processing 工程技术-材料科学:综合
CiteScore
8.00
自引率
4.90%
发文量
780
审稿时长
42 days
期刊介绍: Materials Science in Semiconductor Processing provides a unique forum for the discussion of novel processing, applications and theoretical studies of functional materials and devices for (opto)electronics, sensors, detectors, biotechnology and green energy. Each issue will aim to provide a snapshot of current insights, new achievements, breakthroughs and future trends in such diverse fields as microelectronics, energy conversion and storage, communications, biotechnology, (photo)catalysis, nano- and thin-film technology, hybrid and composite materials, chemical processing, vapor-phase deposition, device fabrication, and modelling, which are the backbone of advanced semiconductor processing and applications. Coverage will include: advanced lithography for submicron devices; etching and related topics; ion implantation; damage evolution and related issues; plasma and thermal CVD; rapid thermal processing; advanced metallization and interconnect schemes; thin dielectric layers, oxidation; sol-gel processing; chemical bath and (electro)chemical deposition; compound semiconductor processing; new non-oxide materials and their applications; (macro)molecular and hybrid materials; molecular dynamics, ab-initio methods, Monte Carlo, etc.; new materials and processes for discrete and integrated circuits; magnetic materials and spintronics; heterostructures and quantum devices; engineering of the electrical and optical properties of semiconductors; crystal growth mechanisms; reliability, defect density, intrinsic impurities and defects.
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