{"title":"铁电/电介质电容比对 MFMIS FeFET 短期保持特性的影响","authors":"Junghyeon Hwang;Giuk Kim;Hongrae Joh;Jinho Ahn;Sanghun Jeon","doi":"10.1109/JEDS.2024.3485869","DOIUrl":null,"url":null,"abstract":"Metal-ferroelectric-metal-insulator-semiconductor (MFMIS) FeFETs have significant potential for use in non-volatile memory applications. This is primarily due to their compatibility with CMOS technology and reliable switching characteristics. Previous studies have primarily concentrated on the endurance and memory window properties, while this study focuses on the short-term (<\n<inline-formula> <tex-math>$1~\\mu $ </tex-math></inline-formula>\ns) retention region of MFMIS FeFETs. Specifically, we examine the impact of the capacitance ratio of the ferroelectric capacitor (CFE) and the MOS capacitor (CDE) on short-term retention. Additionally, we conducted simulations to validate the experimental observations and investigate the interaction of the depolarization field with the charge trapping and polarization of the MFMIS structure. This study emphasizes the crucial role of controlling the CDE: \n<inline-formula> <tex-math>${\\mathrm { C}}_{\\mathrm { FE}}$ </tex-math></inline-formula>\n ratio in enhancing the short-term retention of MFMIS FeFETs. Its findings enhance our understanding of short-term retention mechanisms and provide a pathway for improving performance and functionality in non-volatile memory technology design.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"12 ","pages":"988-992"},"PeriodicalIF":2.0000,"publicationDate":"2024-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10734331","citationCount":"0","resultStr":"{\"title\":\"The Effect of Ferroelectric/Dielectric Capacitance Ratio on Short-Term Retention Characteristics of MFMIS FeFET\",\"authors\":\"Junghyeon Hwang;Giuk Kim;Hongrae Joh;Jinho Ahn;Sanghun Jeon\",\"doi\":\"10.1109/JEDS.2024.3485869\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Metal-ferroelectric-metal-insulator-semiconductor (MFMIS) FeFETs have significant potential for use in non-volatile memory applications. This is primarily due to their compatibility with CMOS technology and reliable switching characteristics. Previous studies have primarily concentrated on the endurance and memory window properties, while this study focuses on the short-term (<\\n<inline-formula> <tex-math>$1~\\\\mu $ </tex-math></inline-formula>\\ns) retention region of MFMIS FeFETs. Specifically, we examine the impact of the capacitance ratio of the ferroelectric capacitor (CFE) and the MOS capacitor (CDE) on short-term retention. Additionally, we conducted simulations to validate the experimental observations and investigate the interaction of the depolarization field with the charge trapping and polarization of the MFMIS structure. This study emphasizes the crucial role of controlling the CDE: \\n<inline-formula> <tex-math>${\\\\mathrm { C}}_{\\\\mathrm { FE}}$ </tex-math></inline-formula>\\n ratio in enhancing the short-term retention of MFMIS FeFETs. Its findings enhance our understanding of short-term retention mechanisms and provide a pathway for improving performance and functionality in non-volatile memory technology design.\",\"PeriodicalId\":13210,\"journal\":{\"name\":\"IEEE Journal of the Electron Devices Society\",\"volume\":\"12 \",\"pages\":\"988-992\"},\"PeriodicalIF\":2.0000,\"publicationDate\":\"2024-10-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10734331\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Journal of the Electron Devices Society\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10734331/\",\"RegionNum\":3,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Journal of the Electron Devices Society","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10734331/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
The Effect of Ferroelectric/Dielectric Capacitance Ratio on Short-Term Retention Characteristics of MFMIS FeFET
Metal-ferroelectric-metal-insulator-semiconductor (MFMIS) FeFETs have significant potential for use in non-volatile memory applications. This is primarily due to their compatibility with CMOS technology and reliable switching characteristics. Previous studies have primarily concentrated on the endurance and memory window properties, while this study focuses on the short-term (<
$1~\mu $
s) retention region of MFMIS FeFETs. Specifically, we examine the impact of the capacitance ratio of the ferroelectric capacitor (CFE) and the MOS capacitor (CDE) on short-term retention. Additionally, we conducted simulations to validate the experimental observations and investigate the interaction of the depolarization field with the charge trapping and polarization of the MFMIS structure. This study emphasizes the crucial role of controlling the CDE:
${\mathrm { C}}_{\mathrm { FE}}$
ratio in enhancing the short-term retention of MFMIS FeFETs. Its findings enhance our understanding of short-term retention mechanisms and provide a pathway for improving performance and functionality in non-volatile memory technology design.
期刊介绍:
The IEEE Journal of the Electron Devices Society (J-EDS) is an open-access, fully electronic scientific journal publishing papers ranging from fundamental to applied research that are scientifically rigorous and relevant to electron devices. The J-EDS publishes original and significant contributions relating to the theory, modelling, design, performance, and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanodevices, optoelectronics, photovoltaics, power IC''s, and micro-sensors. Tutorial and review papers on these subjects are, also, published. And, occasionally special issues with a collection of papers on particular areas in more depth and breadth are, also, published. J-EDS publishes all papers that are judged to be technically valid and original.