Investigating Performance Enhancement of CMOS Terahertz Detectors With Different Topological Structures at 2.58 THz

In this study, we designed a terahertz (THz) detector chip based on field-effect transistors utilizing a standard 55-nm complementary metal–oxide–semiconductor process. The chip includes eight different detector structures to explore the impact of various factors on detector performance. Each detector, characterized by its unique structural design, exhibited varying levels of parasitic capacitance, port impedance matching, and asymmetry, all impacting the detector's responsivity ( R_v ). Building on the previous nonquasi-static model, this research introduced a comprehensive THz detector model by incorporating plasma wave detection theory, antenna impedance, parasitic effects of the detector, port impedance, and load effects. We also derived the mathematical expression for R_v in the nonresonant mode. The multiple different structures detectors integrated with antenna-on-chip achieved the maximum R_v of 437.6V/W and the minimum noise-equivalent power (NEP) of 119 pW/Hz ^1/2 at 2.58 THz. We then conducted scanning imaging on a paper envelope containing a screw. The appearance of the screw and the details of creases at various thicknesses on the envelope were clearly visible. Analysis indicated that the detector's R_v and NEP are closely linked to several factors, including the match between the antenna and the detector, the parasitic capacitance at the THz wave coupling site, the maximization of THz wave energy coupled to the detector, the appropriate size of the detector, and the asymmetry between the source and drain.