{"title":"利用基于机器学习的帕累托优化新方法控制程序脉冲,提高 3D-NAND 闪存的编程效率和干扰度","authors":"Kihoon Nam;Donghyun Kim;Hyeok Yun;Chanyang Park;Hyundong Jang;Kyeongrae Cho;Seungjoon Eom;Jiyoon Kim;Seonhaeng Lee;Namhyun Lee;Gang-Jun Kim;Rock-Hyun Baek","doi":"10.1109/TED.2024.3469186","DOIUrl":null,"url":null,"abstract":"We propose a novel approach that combines machine learning (ML) and Pareto optimization to simultaneously enhance the program efficiency and disturbance of 3D-NAND flash memory. The relationship between program pulse (PP) shapes and threshold voltage shifts has never been investigated owing to the presence of numerous PP shapes. The complex relationship is modeled rapidly and quantitatively by leveraging ML. A multiobjective optimization problem is designed to consider the trade-off in program efficiency and disturbance. Pareto optimization facilitates determining PP shapes that achieve optimal solutions between maximizing program efficiency and minimizing program disturbance. The Pareto front provides practical and intuitive candidates for determining optimal PP shapes. Experimental results confirm that the program efficiency and disturbance can be enhanced by 14%–22% and 5%–40%, respectively. The ML-based Pareto optimization has the potential to vary the pulse conditions for desired operations in 3D-NAND flash, which is the biggest nonvolatile memory market in the semiconductor industry.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"71 11","pages":"6713-6718"},"PeriodicalIF":2.9000,"publicationDate":"2024-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Program Pulse Control for Program Efficiency and Disturbance of 3D-NAND Flash Using Novel Machine Learning-Based Pareto Optimization\",\"authors\":\"Kihoon Nam;Donghyun Kim;Hyeok Yun;Chanyang Park;Hyundong Jang;Kyeongrae Cho;Seungjoon Eom;Jiyoon Kim;Seonhaeng Lee;Namhyun Lee;Gang-Jun Kim;Rock-Hyun Baek\",\"doi\":\"10.1109/TED.2024.3469186\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We propose a novel approach that combines machine learning (ML) and Pareto optimization to simultaneously enhance the program efficiency and disturbance of 3D-NAND flash memory. The relationship between program pulse (PP) shapes and threshold voltage shifts has never been investigated owing to the presence of numerous PP shapes. The complex relationship is modeled rapidly and quantitatively by leveraging ML. A multiobjective optimization problem is designed to consider the trade-off in program efficiency and disturbance. Pareto optimization facilitates determining PP shapes that achieve optimal solutions between maximizing program efficiency and minimizing program disturbance. The Pareto front provides practical and intuitive candidates for determining optimal PP shapes. Experimental results confirm that the program efficiency and disturbance can be enhanced by 14%–22% and 5%–40%, respectively. The ML-based Pareto optimization has the potential to vary the pulse conditions for desired operations in 3D-NAND flash, which is the biggest nonvolatile memory market in the semiconductor industry.\",\"PeriodicalId\":13092,\"journal\":{\"name\":\"IEEE Transactions on Electron Devices\",\"volume\":\"71 11\",\"pages\":\"6713-6718\"},\"PeriodicalIF\":2.9000,\"publicationDate\":\"2024-10-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Electron Devices\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10706584/\",\"RegionNum\":2,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Electron Devices","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10706584/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
摘要
我们提出了一种结合机器学习(ML)和帕累托优化的新方法,可同时提高 3D-NAND 闪存的编程效率和干扰。由于程序脉冲(PP)形状繁多,阈值电压偏移与程序脉冲(PP)形状之间的关系从未被研究过。我们利用 ML 对这一复杂关系进行了快速定量建模。设计了一个多目标优化问题,以考虑程序效率和干扰之间的权衡。帕累托优化有助于确定 PP 形状,从而在最大化程序效率和最小化程序干扰之间找到最佳解决方案。帕累托前沿为确定最佳 PP 形状提供了实用而直观的候选方案。实验结果证实,程序效率和干扰可分别提高 14%-22% 和 5%-40% 。基于 ML 的帕累托优化有可能改变 3D-NAND 闪存中理想操作的脉冲条件,而 3D-NAND 闪存是半导体行业最大的非易失性存储器市场。
Program Pulse Control for Program Efficiency and Disturbance of 3D-NAND Flash Using Novel Machine Learning-Based Pareto Optimization
We propose a novel approach that combines machine learning (ML) and Pareto optimization to simultaneously enhance the program efficiency and disturbance of 3D-NAND flash memory. The relationship between program pulse (PP) shapes and threshold voltage shifts has never been investigated owing to the presence of numerous PP shapes. The complex relationship is modeled rapidly and quantitatively by leveraging ML. A multiobjective optimization problem is designed to consider the trade-off in program efficiency and disturbance. Pareto optimization facilitates determining PP shapes that achieve optimal solutions between maximizing program efficiency and minimizing program disturbance. The Pareto front provides practical and intuitive candidates for determining optimal PP shapes. Experimental results confirm that the program efficiency and disturbance can be enhanced by 14%–22% and 5%–40%, respectively. The ML-based Pareto optimization has the potential to vary the pulse conditions for desired operations in 3D-NAND flash, which is the biggest nonvolatile memory market in the semiconductor industry.
期刊介绍:
IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors. Tutorial and review papers on these subjects are also published and occasional special issues appear to present a collection of papers which treat particular areas in more depth and breadth.