利用 SILC 光谱分析 45 纳米 PDSOI 超薄栅氧化 FET 中的 AC-TDDB 行为

IF 2.9 2区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Asifa Amin;Sumreti Gupta;Purushothaman Srinivasan;Oscar H. Gonzalez;Abhisek Dixit
{"title":"利用 SILC 光谱分析 45 纳米 PDSOI 超薄栅氧化 FET 中的 AC-TDDB 行为","authors":"Asifa Amin;Sumreti Gupta;Purushothaman Srinivasan;Oscar H. Gonzalez;Abhisek Dixit","doi":"10.1109/TED.2024.3456780","DOIUrl":null,"url":null,"abstract":"In this article, an extensive experimental investigation of alternating current (ac)-time-dependent dielectric breakdown (TDDB) in 45 nm technology-based partially depleted silicon-on-insulator (PDSOI) devices is presented. This investigation is performed on ultra-thin oxide devices of two different thicknesses at \n<inline-formula> <tex-math>$125~^{\\circ }$ </tex-math></inline-formula>\nC. The effect of oxide thickness, device polarity, and ac stress variables are studied in detail. Based on ac frequencies and duty cycles (DTCs), the lifetime at radio frequencies (RFs) up to 1 GHz is predicted using the frequency power law. Almost a \n<inline-formula> <tex-math>$90\\times $ </tex-math></inline-formula>\n increase in T63 at RF is observed when compared to T63 under direct current (dc) stress in thin NFETs. A comprehensive study using stress-induced leakage current (SILC) spectroscopy in these devices is utilized for studying the breakdown behavior further. The SILC and trap generation rate is a function of frequency, DTC, and gate sense voltage, leading to an improved lifetime under ac stress. Furthermore, temperature-dependent ac TDDB investigations show that a higher trap generation rate at high temperatures leads to accelerated damage leading to shorter time-to-breakdown (TBD).","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"71 11","pages":"6486-6492"},"PeriodicalIF":2.9000,"publicationDate":"2024-09-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"AC-TDDB Behavior in 45 nm PDSOI Ultra-Thin Gate Oxide FETs Using SILC Spectroscopy\",\"authors\":\"Asifa Amin;Sumreti Gupta;Purushothaman Srinivasan;Oscar H. Gonzalez;Abhisek Dixit\",\"doi\":\"10.1109/TED.2024.3456780\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this article, an extensive experimental investigation of alternating current (ac)-time-dependent dielectric breakdown (TDDB) in 45 nm technology-based partially depleted silicon-on-insulator (PDSOI) devices is presented. This investigation is performed on ultra-thin oxide devices of two different thicknesses at \\n<inline-formula> <tex-math>$125~^{\\\\circ }$ </tex-math></inline-formula>\\nC. The effect of oxide thickness, device polarity, and ac stress variables are studied in detail. Based on ac frequencies and duty cycles (DTCs), the lifetime at radio frequencies (RFs) up to 1 GHz is predicted using the frequency power law. Almost a \\n<inline-formula> <tex-math>$90\\\\times $ </tex-math></inline-formula>\\n increase in T63 at RF is observed when compared to T63 under direct current (dc) stress in thin NFETs. A comprehensive study using stress-induced leakage current (SILC) spectroscopy in these devices is utilized for studying the breakdown behavior further. The SILC and trap generation rate is a function of frequency, DTC, and gate sense voltage, leading to an improved lifetime under ac stress. Furthermore, temperature-dependent ac TDDB investigations show that a higher trap generation rate at high temperatures leads to accelerated damage leading to shorter time-to-breakdown (TBD).\",\"PeriodicalId\":13092,\"journal\":{\"name\":\"IEEE Transactions on Electron Devices\",\"volume\":\"71 11\",\"pages\":\"6486-6492\"},\"PeriodicalIF\":2.9000,\"publicationDate\":\"2024-09-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Electron Devices\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10684983/\",\"RegionNum\":2,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Electron Devices","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10684983/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

摘要

本文对基于 45 纳米技术的部分耗尽型绝缘体上硅 (PDSOI) 器件中的交流电(ac)-时间相关介质击穿(TDDB)进行了广泛的实验研究。这项研究是在 125~^{\circ }$ C 下对两种不同厚度的超薄氧化物器件进行的。根据交流频率和占空比 (DTC),利用频率幂律预测了高达 1 GHz 的射频 (RF) 寿命。与薄型 NFET 中直流应力下的 T63 相比,观察到射频下的 T63 几乎增加了 90 倍。为了进一步研究击穿行为,我们利用应力诱导漏电流(SILC)光谱对这些器件进行了全面研究。SILC 和陷阱产生率是频率、DTC 和栅极感应电压的函数,从而提高了交流应力下的寿命。此外,与温度相关的交流 TDDB 研究表明,高温下更高的陷阱产生率会导致加速损坏,从而缩短击穿时间 (TBD)。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
AC-TDDB Behavior in 45 nm PDSOI Ultra-Thin Gate Oxide FETs Using SILC Spectroscopy
In this article, an extensive experimental investigation of alternating current (ac)-time-dependent dielectric breakdown (TDDB) in 45 nm technology-based partially depleted silicon-on-insulator (PDSOI) devices is presented. This investigation is performed on ultra-thin oxide devices of two different thicknesses at $125~^{\circ }$ C. The effect of oxide thickness, device polarity, and ac stress variables are studied in detail. Based on ac frequencies and duty cycles (DTCs), the lifetime at radio frequencies (RFs) up to 1 GHz is predicted using the frequency power law. Almost a $90\times $ increase in T63 at RF is observed when compared to T63 under direct current (dc) stress in thin NFETs. A comprehensive study using stress-induced leakage current (SILC) spectroscopy in these devices is utilized for studying the breakdown behavior further. The SILC and trap generation rate is a function of frequency, DTC, and gate sense voltage, leading to an improved lifetime under ac stress. Furthermore, temperature-dependent ac TDDB investigations show that a higher trap generation rate at high temperatures leads to accelerated damage leading to shorter time-to-breakdown (TBD).
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
IEEE Transactions on Electron Devices
IEEE Transactions on Electron Devices 工程技术-工程:电子与电气
CiteScore
5.80
自引率
16.10%
发文量
937
审稿时长
3.8 months
期刊介绍: IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors. Tutorial and review papers on these subjects are also published and occasional special issues appear to present a collection of papers which treat particular areas in more depth and breadth.
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信